Lines Matching refs:halg
3768 .halg.digestsize = MD5_DIGEST_SIZE,
3769 .halg.base = {
3789 .halg.digestsize = MD5_DIGEST_SIZE,
3790 .halg.base = {
3807 .halg.digestsize = SHA1_DIGEST_SIZE,
3808 .halg.base = {
3825 .halg.digestsize = SHA1_DIGEST_SIZE,
3826 .halg.base = {
3843 .halg.digestsize = SHA224_DIGEST_SIZE,
3844 .halg.base = {
3861 .halg.digestsize = SHA224_DIGEST_SIZE,
3862 .halg.base = {
3879 .halg.digestsize = SHA256_DIGEST_SIZE,
3880 .halg.base = {
3897 .halg.digestsize = SHA256_DIGEST_SIZE,
3898 .halg.base = {
3916 .halg.digestsize = SHA384_DIGEST_SIZE,
3917 .halg.base = {
3935 .halg.digestsize = SHA384_DIGEST_SIZE,
3936 .halg.base = {
3954 .halg.digestsize = SHA512_DIGEST_SIZE,
3955 .halg.base = {
3973 .halg.digestsize = SHA512_DIGEST_SIZE,
3974 .halg.base = {
3992 .halg.digestsize = SHA3_224_DIGEST_SIZE,
3993 .halg.base = {
4011 .halg.digestsize = SHA3_224_DIGEST_SIZE,
4012 .halg.base = {
4030 .halg.digestsize = SHA3_256_DIGEST_SIZE,
4031 .halg.base = {
4049 .halg.digestsize = SHA3_256_DIGEST_SIZE,
4050 .halg.base = {
4068 .halg.digestsize = SHA3_384_DIGEST_SIZE,
4069 .halg.base = {
4087 .halg.digestsize = SHA3_384_DIGEST_SIZE,
4088 .halg.base = {
4106 .halg.digestsize = SHA3_512_DIGEST_SIZE,
4107 .halg.base = {
4125 .halg.digestsize = SHA3_512_DIGEST_SIZE,
4126 .halg.base = {
4144 .halg.digestsize = AES_BLOCK_SIZE,
4145 .halg.base = {
4163 .halg.digestsize = AES_BLOCK_SIZE,
4164 .halg.base = {
4500 hash->halg.base.cra_module = THIS_MODULE; in spu_register_ahash()
4501 hash->halg.base.cra_priority = hash_pri; in spu_register_ahash()
4502 hash->halg.base.cra_alignmask = 0; in spu_register_ahash()
4503 hash->halg.base.cra_ctxsize = sizeof(struct iproc_ctx_s); in spu_register_ahash()
4504 hash->halg.base.cra_init = ahash_cra_init; in spu_register_ahash()
4505 hash->halg.base.cra_exit = generic_cra_exit; in spu_register_ahash()
4506 hash->halg.base.cra_flags = CRYPTO_ALG_ASYNC | in spu_register_ahash()
4508 hash->halg.statesize = sizeof(struct spu_hash_export_s); in spu_register_ahash()
4537 hash->halg.base.cra_driver_name); in spu_register_ahash()
4770 cdn = driver_algs[i].alg.hash.halg.base.cra_driver_name; in bcm_spu_remove()