Lines Matching refs:qm
285 static void hisi_zip_open_sva_prefetch(struct hisi_qm *qm) in hisi_zip_open_sva_prefetch() argument
290 if (qm->ver < QM_HW_V3) in hisi_zip_open_sva_prefetch()
294 val = readl_relaxed(qm->io_base + HZIP_PREFETCH_CFG); in hisi_zip_open_sva_prefetch()
296 writel(val, qm->io_base + HZIP_PREFETCH_CFG); in hisi_zip_open_sva_prefetch()
298 ret = readl_relaxed_poll_timeout(qm->io_base + HZIP_PREFETCH_CFG, in hisi_zip_open_sva_prefetch()
302 pci_err(qm->pdev, "failed to open sva prefetch\n"); in hisi_zip_open_sva_prefetch()
305 static void hisi_zip_close_sva_prefetch(struct hisi_qm *qm) in hisi_zip_close_sva_prefetch() argument
310 if (qm->ver < QM_HW_V3) in hisi_zip_close_sva_prefetch()
313 val = readl_relaxed(qm->io_base + HZIP_PREFETCH_CFG); in hisi_zip_close_sva_prefetch()
315 writel(val, qm->io_base + HZIP_PREFETCH_CFG); in hisi_zip_close_sva_prefetch()
317 ret = readl_relaxed_poll_timeout(qm->io_base + HZIP_SVA_TRANS, in hisi_zip_close_sva_prefetch()
321 pci_err(qm->pdev, "failed to close sva prefetch\n"); in hisi_zip_close_sva_prefetch()
324 static void hisi_zip_enable_clock_gate(struct hisi_qm *qm) in hisi_zip_enable_clock_gate() argument
328 if (qm->ver < QM_HW_V3) in hisi_zip_enable_clock_gate()
331 val = readl(qm->io_base + HZIP_CLOCK_GATE_CTRL); in hisi_zip_enable_clock_gate()
333 writel(val, qm->io_base + HZIP_CLOCK_GATE_CTRL); in hisi_zip_enable_clock_gate()
335 val = readl(qm->io_base + HZIP_PEH_CFG_AUTO_GATE); in hisi_zip_enable_clock_gate()
337 writel(val, qm->io_base + HZIP_PEH_CFG_AUTO_GATE); in hisi_zip_enable_clock_gate()
340 static int hisi_zip_set_user_domain_and_cache(struct hisi_qm *qm) in hisi_zip_set_user_domain_and_cache() argument
342 void __iomem *base = qm->io_base; in hisi_zip_set_user_domain_and_cache()
370 if (qm->use_sva && qm->ver == QM_HW_V2) { in hisi_zip_set_user_domain_and_cache()
387 hisi_zip_enable_clock_gate(qm); in hisi_zip_set_user_domain_and_cache()
392 static void hisi_zip_master_ooo_ctrl(struct hisi_qm *qm, bool enable) in hisi_zip_master_ooo_ctrl() argument
396 val1 = readl(qm->io_base + HZIP_SOFT_CTRL_ZIP_CONTROL); in hisi_zip_master_ooo_ctrl()
405 if (qm->ver > QM_HW_V2) in hisi_zip_master_ooo_ctrl()
406 writel(val2, qm->io_base + HZIP_OOO_SHUTDOWN_SEL); in hisi_zip_master_ooo_ctrl()
408 writel(val1, qm->io_base + HZIP_SOFT_CTRL_ZIP_CONTROL); in hisi_zip_master_ooo_ctrl()
411 static void hisi_zip_hw_error_enable(struct hisi_qm *qm) in hisi_zip_hw_error_enable() argument
413 if (qm->ver == QM_HW_V1) { in hisi_zip_hw_error_enable()
415 qm->io_base + HZIP_CORE_INT_MASK_REG); in hisi_zip_hw_error_enable()
416 dev_info(&qm->pdev->dev, "Does not support hw error handle\n"); in hisi_zip_hw_error_enable()
421 writel(HZIP_CORE_INT_MASK_ALL, qm->io_base + HZIP_CORE_INT_SOURCE); in hisi_zip_hw_error_enable()
425 qm->io_base + HZIP_CORE_INT_RAS_CE_ENB); in hisi_zip_hw_error_enable()
426 writel(0x0, qm->io_base + HZIP_CORE_INT_RAS_FE_ENB); in hisi_zip_hw_error_enable()
428 qm->io_base + HZIP_CORE_INT_RAS_NFE_ENB); in hisi_zip_hw_error_enable()
431 hisi_zip_master_ooo_ctrl(qm, true); in hisi_zip_hw_error_enable()
434 writel(0, qm->io_base + HZIP_CORE_INT_MASK_REG); in hisi_zip_hw_error_enable()
437 static void hisi_zip_hw_error_disable(struct hisi_qm *qm) in hisi_zip_hw_error_disable() argument
440 writel(HZIP_CORE_INT_MASK_ALL, qm->io_base + HZIP_CORE_INT_MASK_REG); in hisi_zip_hw_error_disable()
443 hisi_zip_master_ooo_ctrl(qm, false); in hisi_zip_hw_error_disable()
450 return &hisi_zip->qm; in file_to_qm()
453 static u32 clear_enable_read(struct hisi_qm *qm) in clear_enable_read() argument
455 return readl(qm->io_base + HZIP_SOFT_CTRL_CNT_CLR_CE) & in clear_enable_read()
459 static int clear_enable_write(struct hisi_qm *qm, u32 val) in clear_enable_write() argument
466 tmp = (readl(qm->io_base + HZIP_SOFT_CTRL_CNT_CLR_CE) & in clear_enable_write()
468 writel(tmp, qm->io_base + HZIP_SOFT_CTRL_CNT_CLR_CE); in clear_enable_write()
477 struct hisi_qm *qm = file_to_qm(file); in hisi_zip_ctrl_debug_read() local
482 ret = hisi_qm_get_dfx_access(qm); in hisi_zip_ctrl_debug_read()
489 val = clear_enable_read(qm); in hisi_zip_ctrl_debug_read()
496 hisi_qm_put_dfx_access(qm); in hisi_zip_ctrl_debug_read()
502 hisi_qm_put_dfx_access(qm); in hisi_zip_ctrl_debug_read()
511 struct hisi_qm *qm = file_to_qm(file); in hisi_zip_ctrl_debug_write() local
530 ret = hisi_qm_get_dfx_access(qm); in hisi_zip_ctrl_debug_write()
537 ret = clear_enable_write(qm, val); in hisi_zip_ctrl_debug_write()
550 hisi_qm_put_dfx_access(qm); in hisi_zip_ctrl_debug_write()
590 static int hisi_zip_core_debug_init(struct hisi_qm *qm) in hisi_zip_core_debug_init() argument
592 struct device *dev = &qm->pdev->dev; in hisi_zip_core_debug_init()
611 regset->base = qm->io_base + core_offsets[i]; in hisi_zip_core_debug_init()
614 tmp_d = debugfs_create_dir(buf, qm->debug.debug_root); in hisi_zip_core_debug_init()
622 static void hisi_zip_dfx_debug_init(struct hisi_qm *qm) in hisi_zip_dfx_debug_init() argument
624 struct hisi_zip *zip = container_of(qm, struct hisi_zip, qm); in hisi_zip_dfx_debug_init()
630 tmp_dir = debugfs_create_dir("zip_dfx", qm->debug.debug_root); in hisi_zip_dfx_debug_init()
639 static int hisi_zip_ctrl_debug_init(struct hisi_qm *qm) in hisi_zip_ctrl_debug_init() argument
641 struct hisi_zip *zip = container_of(qm, struct hisi_zip, qm); in hisi_zip_ctrl_debug_init()
650 qm->debug.debug_root, in hisi_zip_ctrl_debug_init()
655 return hisi_zip_core_debug_init(qm); in hisi_zip_ctrl_debug_init()
658 static int hisi_zip_debugfs_init(struct hisi_qm *qm) in hisi_zip_debugfs_init() argument
660 struct device *dev = &qm->pdev->dev; in hisi_zip_debugfs_init()
666 qm->debug.sqe_mask_offset = HZIP_SQE_MASK_OFFSET; in hisi_zip_debugfs_init()
667 qm->debug.sqe_mask_len = HZIP_SQE_MASK_LEN; in hisi_zip_debugfs_init()
668 qm->debug.debug_root = dev_d; in hisi_zip_debugfs_init()
669 hisi_qm_debug_init(qm); in hisi_zip_debugfs_init()
671 if (qm->fun_type == QM_HW_PF) { in hisi_zip_debugfs_init()
672 ret = hisi_zip_ctrl_debug_init(qm); in hisi_zip_debugfs_init()
677 hisi_zip_dfx_debug_init(qm); in hisi_zip_debugfs_init()
687 static void hisi_zip_debug_regs_clear(struct hisi_qm *qm) in hisi_zip_debug_regs_clear() argument
692 writel(HZIP_RD_CNT_CLR_CE_EN, qm->io_base + HZIP_SOFT_CTRL_CNT_CLR_CE); in hisi_zip_debug_regs_clear()
695 readl(qm->io_base + core_offsets[i] + in hisi_zip_debug_regs_clear()
699 writel(0x0, qm->io_base + HZIP_SOFT_CTRL_CNT_CLR_CE); in hisi_zip_debug_regs_clear()
701 hisi_qm_debug_regs_clear(qm); in hisi_zip_debug_regs_clear()
704 static void hisi_zip_debugfs_exit(struct hisi_qm *qm) in hisi_zip_debugfs_exit() argument
706 debugfs_remove_recursive(qm->debug.debug_root); in hisi_zip_debugfs_exit()
708 if (qm->fun_type == QM_HW_PF) { in hisi_zip_debugfs_exit()
709 hisi_zip_debug_regs_clear(qm); in hisi_zip_debugfs_exit()
710 qm->debug.curr_qm_qp_num = 0; in hisi_zip_debugfs_exit()
714 static void hisi_zip_log_hw_error(struct hisi_qm *qm, u32 err_sts) in hisi_zip_log_hw_error() argument
717 struct device *dev = &qm->pdev->dev; in hisi_zip_log_hw_error()
726 err_val = readl(qm->io_base + in hisi_zip_log_hw_error()
737 static u32 hisi_zip_get_hw_err_status(struct hisi_qm *qm) in hisi_zip_get_hw_err_status() argument
739 return readl(qm->io_base + HZIP_CORE_INT_STATUS); in hisi_zip_get_hw_err_status()
742 static void hisi_zip_clear_hw_err_status(struct hisi_qm *qm, u32 err_sts) in hisi_zip_clear_hw_err_status() argument
744 writel(err_sts, qm->io_base + HZIP_CORE_INT_SOURCE); in hisi_zip_clear_hw_err_status()
747 static void hisi_zip_open_axi_master_ooo(struct hisi_qm *qm) in hisi_zip_open_axi_master_ooo() argument
751 val = readl(qm->io_base + HZIP_SOFT_CTRL_ZIP_CONTROL); in hisi_zip_open_axi_master_ooo()
754 qm->io_base + HZIP_SOFT_CTRL_ZIP_CONTROL); in hisi_zip_open_axi_master_ooo()
757 qm->io_base + HZIP_SOFT_CTRL_ZIP_CONTROL); in hisi_zip_open_axi_master_ooo()
760 static void hisi_zip_close_axi_master_ooo(struct hisi_qm *qm) in hisi_zip_close_axi_master_ooo() argument
765 nfe_enb = readl(qm->io_base + HZIP_CORE_INT_RAS_NFE_ENB); in hisi_zip_close_axi_master_ooo()
767 qm->io_base + HZIP_CORE_INT_RAS_NFE_ENB); in hisi_zip_close_axi_master_ooo()
771 qm->io_base + HZIP_CORE_INT_SET); in hisi_zip_close_axi_master_ooo()
774 static void hisi_zip_err_info_init(struct hisi_qm *qm) in hisi_zip_err_info_init() argument
776 struct hisi_qm_err_info *err_info = &qm->err_info; in hisi_zip_err_info_init()
786 if (qm->ver >= QM_HW_V3) in hisi_zip_err_info_init()
806 struct hisi_qm *qm = &hisi_zip->qm; in hisi_zip_pf_probe_init() local
809 ctrl = devm_kzalloc(&qm->pdev->dev, sizeof(*ctrl), GFP_KERNEL); in hisi_zip_pf_probe_init()
815 qm->err_ini = &hisi_zip_err_ini; in hisi_zip_pf_probe_init()
816 qm->err_ini->err_info_init(qm); in hisi_zip_pf_probe_init()
818 hisi_zip_set_user_domain_and_cache(qm); in hisi_zip_pf_probe_init()
819 hisi_zip_open_sva_prefetch(qm); in hisi_zip_pf_probe_init()
820 hisi_qm_dev_err_init(qm); in hisi_zip_pf_probe_init()
821 hisi_zip_debug_regs_clear(qm); in hisi_zip_pf_probe_init()
826 static int hisi_zip_qm_init(struct hisi_qm *qm, struct pci_dev *pdev) in hisi_zip_qm_init() argument
830 qm->pdev = pdev; in hisi_zip_qm_init()
831 qm->ver = pdev->revision; in hisi_zip_qm_init()
832 qm->algs = "zlib\ngzip"; in hisi_zip_qm_init()
833 qm->mode = uacce_mode; in hisi_zip_qm_init()
834 qm->sqe_size = HZIP_SQE_SIZE; in hisi_zip_qm_init()
835 qm->dev_name = hisi_zip_name; in hisi_zip_qm_init()
837 qm->fun_type = (pdev->device == PCI_DEVICE_ID_ZIP_PF) ? in hisi_zip_qm_init()
839 if (qm->fun_type == QM_HW_PF) { in hisi_zip_qm_init()
840 qm->qp_base = HZIP_PF_DEF_Q_BASE; in hisi_zip_qm_init()
841 qm->qp_num = pf_q_num; in hisi_zip_qm_init()
842 qm->debug.curr_qm_qp_num = pf_q_num; in hisi_zip_qm_init()
843 qm->qm_list = &zip_devices; in hisi_zip_qm_init()
844 } else if (qm->fun_type == QM_HW_VF && qm->ver == QM_HW_V1) { in hisi_zip_qm_init()
852 qm->qp_base = HZIP_PF_DEF_Q_NUM; in hisi_zip_qm_init()
853 qm->qp_num = HZIP_QUEUE_NUM_V1 - HZIP_PF_DEF_Q_NUM; in hisi_zip_qm_init()
856 qm->wq = alloc_workqueue("%s", WQ_HIGHPRI | WQ_MEM_RECLAIM | in hisi_zip_qm_init()
858 pci_name(qm->pdev)); in hisi_zip_qm_init()
859 if (!qm->wq) { in hisi_zip_qm_init()
860 pci_err(qm->pdev, "fail to alloc workqueue\n"); in hisi_zip_qm_init()
864 ret = hisi_qm_init(qm); in hisi_zip_qm_init()
866 destroy_workqueue(qm->wq); in hisi_zip_qm_init()
871 static void hisi_zip_qm_uninit(struct hisi_qm *qm) in hisi_zip_qm_uninit() argument
873 hisi_qm_uninit(qm); in hisi_zip_qm_uninit()
874 destroy_workqueue(qm->wq); in hisi_zip_qm_uninit()
880 struct hisi_qm *qm = &hisi_zip->qm; in hisi_zip_probe_init() local
883 if (qm->fun_type == QM_HW_PF) { in hisi_zip_probe_init()
888 if (qm->ver >= QM_HW_V3) { in hisi_zip_probe_init()
893 qm->type_rate = type_rate; in hisi_zip_probe_init()
903 struct hisi_qm *qm; in hisi_zip_probe() local
910 qm = &hisi_zip->qm; in hisi_zip_probe()
912 ret = hisi_zip_qm_init(qm, pdev); in hisi_zip_probe()
924 ret = hisi_qm_start(qm); in hisi_zip_probe()
928 ret = hisi_zip_debugfs_init(qm); in hisi_zip_probe()
932 ret = hisi_qm_alg_register(qm, &zip_devices); in hisi_zip_probe()
938 if (qm->uacce) { in hisi_zip_probe()
939 ret = uacce_register(qm->uacce); in hisi_zip_probe()
946 if (qm->fun_type == QM_HW_PF && vfs_num > 0) { in hisi_zip_probe()
952 hisi_qm_pm_init(qm); in hisi_zip_probe()
957 hisi_qm_alg_unregister(qm, &zip_devices); in hisi_zip_probe()
960 hisi_zip_debugfs_exit(qm); in hisi_zip_probe()
961 hisi_qm_stop(qm, QM_NORMAL); in hisi_zip_probe()
964 hisi_qm_dev_err_uninit(qm); in hisi_zip_probe()
967 hisi_zip_qm_uninit(qm); in hisi_zip_probe()
974 struct hisi_qm *qm = pci_get_drvdata(pdev); in hisi_zip_remove() local
976 hisi_qm_pm_uninit(qm); in hisi_zip_remove()
977 hisi_qm_wait_task_finish(qm, &zip_devices); in hisi_zip_remove()
978 hisi_qm_alg_unregister(qm, &zip_devices); in hisi_zip_remove()
980 if (qm->fun_type == QM_HW_PF && qm->vfs_num) in hisi_zip_remove()
983 hisi_zip_debugfs_exit(qm); in hisi_zip_remove()
984 hisi_qm_stop(qm, QM_NORMAL); in hisi_zip_remove()
985 hisi_qm_dev_err_uninit(qm); in hisi_zip_remove()
986 hisi_zip_qm_uninit(qm); in hisi_zip_remove()