Lines Matching refs:state_sz
64 u32 state_sz; member
490 alg, ctx->state_sz)) in safexcel_aead_setkey()
519 ctrl_size += ctx->state_sz / sizeof(u32); in safexcel_context_control()
537 ctrl_size += ctx->state_sz / sizeof(u32) * 2; in safexcel_context_control()
704 &ctx->base.ipad, ctx->state_sz); in safexcel_send_req()
707 ctx->state_sz) / sizeof(u32), &ctx->base.opad, in safexcel_send_req()
708 ctx->state_sz); in safexcel_send_req()
1728 ctx->state_sz = SHA1_DIGEST_SIZE; in safexcel_aead_sha1_cra_init()
1764 ctx->state_sz = SHA256_DIGEST_SIZE; in safexcel_aead_sha256_cra_init()
1800 ctx->state_sz = SHA256_DIGEST_SIZE; in safexcel_aead_sha224_cra_init()
1836 ctx->state_sz = SHA512_DIGEST_SIZE; in safexcel_aead_sha512_cra_init()
1872 ctx->state_sz = SHA512_DIGEST_SIZE; in safexcel_aead_sha384_cra_init()
2625 ctx->state_sz = GHASH_BLOCK_SIZE; in safexcel_aead_gcm_cra_init()
2705 ctx->state_sz = 2 * AES_BLOCK_SIZE + len; in safexcel_aead_ccm_setkey()
2724 ctx->state_sz = 3 * AES_BLOCK_SIZE; in safexcel_aead_ccm_cra_init()
2984 ctx->state_sz = 0; /* Precomputed by HW */ in safexcel_aead_chachapoly_cra_init()
3340 ctx->state_sz = SHA1_DIGEST_SIZE; in safexcel_aead_sm4cbc_sha1_cra_init()
3449 ctx->state_sz = SM3_DIGEST_SIZE; in safexcel_aead_sm4cbc_sm3_cra_init()