Lines Matching refs:cptpf
15 static void cptpf_enable_vfpf_mbox_intr(struct otx2_cptpf_dev *cptpf, in cptpf_enable_vfpf_mbox_intr() argument
21 otx2_cpt_write64(cptpf->reg_base, BLKADDR_RVUM, 0, in cptpf_enable_vfpf_mbox_intr()
23 otx2_cpt_write64(cptpf->reg_base, BLKADDR_RVUM, 0, in cptpf_enable_vfpf_mbox_intr()
28 otx2_cpt_write64(cptpf->reg_base, BLKADDR_RVUM, 0, in cptpf_enable_vfpf_mbox_intr()
35 otx2_cpt_write64(cptpf->reg_base, BLKADDR_RVUM, 0, in cptpf_enable_vfpf_mbox_intr()
41 static void cptpf_disable_vfpf_mbox_intr(struct otx2_cptpf_dev *cptpf, in cptpf_disable_vfpf_mbox_intr() argument
47 otx2_cpt_write64(cptpf->reg_base, BLKADDR_RVUM, 0, in cptpf_disable_vfpf_mbox_intr()
49 otx2_cpt_write64(cptpf->reg_base, BLKADDR_RVUM, 0, in cptpf_disable_vfpf_mbox_intr()
52 otx2_cpt_write64(cptpf->reg_base, BLKADDR_RVUM, 0, in cptpf_disable_vfpf_mbox_intr()
55 vector = pci_irq_vector(cptpf->pdev, RVU_PF_INT_VEC_VFPF_MBOX0); in cptpf_disable_vfpf_mbox_intr()
56 free_irq(vector, cptpf); in cptpf_disable_vfpf_mbox_intr()
59 otx2_cpt_write64(cptpf->reg_base, BLKADDR_RVUM, 0, in cptpf_disable_vfpf_mbox_intr()
61 vector = pci_irq_vector(cptpf->pdev, RVU_PF_INT_VEC_VFPF_MBOX1); in cptpf_disable_vfpf_mbox_intr()
62 free_irq(vector, cptpf); in cptpf_disable_vfpf_mbox_intr()
66 static void cptpf_enable_vf_flr_me_intrs(struct otx2_cptpf_dev *cptpf, in cptpf_enable_vf_flr_me_intrs() argument
70 otx2_cpt_write64(cptpf->reg_base, BLKADDR_RVUM, 0, RVU_PF_VFFLR_INTX(0), in cptpf_enable_vf_flr_me_intrs()
74 otx2_cpt_write64(cptpf->reg_base, BLKADDR_RVUM, 0, in cptpf_enable_vf_flr_me_intrs()
77 otx2_cpt_write64(cptpf->reg_base, BLKADDR_RVUM, 0, RVU_PF_VFME_INTX(0), in cptpf_enable_vf_flr_me_intrs()
80 otx2_cpt_write64(cptpf->reg_base, BLKADDR_RVUM, 0, in cptpf_enable_vf_flr_me_intrs()
86 otx2_cpt_write64(cptpf->reg_base, BLKADDR_RVUM, 0, RVU_PF_VFFLR_INTX(1), in cptpf_enable_vf_flr_me_intrs()
88 otx2_cpt_write64(cptpf->reg_base, BLKADDR_RVUM, 0, in cptpf_enable_vf_flr_me_intrs()
91 otx2_cpt_write64(cptpf->reg_base, BLKADDR_RVUM, 0, RVU_PF_VFME_INTX(1), in cptpf_enable_vf_flr_me_intrs()
93 otx2_cpt_write64(cptpf->reg_base, BLKADDR_RVUM, 0, in cptpf_enable_vf_flr_me_intrs()
97 static void cptpf_disable_vf_flr_me_intrs(struct otx2_cptpf_dev *cptpf, in cptpf_disable_vf_flr_me_intrs() argument
103 otx2_cpt_write64(cptpf->reg_base, BLKADDR_RVUM, 0, in cptpf_disable_vf_flr_me_intrs()
105 vector = pci_irq_vector(cptpf->pdev, RVU_PF_INT_VEC_VFFLR0); in cptpf_disable_vf_flr_me_intrs()
106 free_irq(vector, cptpf); in cptpf_disable_vf_flr_me_intrs()
109 otx2_cpt_write64(cptpf->reg_base, BLKADDR_RVUM, 0, in cptpf_disable_vf_flr_me_intrs()
111 vector = pci_irq_vector(cptpf->pdev, RVU_PF_INT_VEC_VFME0); in cptpf_disable_vf_flr_me_intrs()
112 free_irq(vector, cptpf); in cptpf_disable_vf_flr_me_intrs()
117 otx2_cpt_write64(cptpf->reg_base, BLKADDR_RVUM, 0, in cptpf_disable_vf_flr_me_intrs()
119 vector = pci_irq_vector(cptpf->pdev, RVU_PF_INT_VEC_VFFLR1); in cptpf_disable_vf_flr_me_intrs()
120 free_irq(vector, cptpf); in cptpf_disable_vf_flr_me_intrs()
122 otx2_cpt_write64(cptpf->reg_base, BLKADDR_RVUM, 0, in cptpf_disable_vf_flr_me_intrs()
124 vector = pci_irq_vector(cptpf->pdev, RVU_PF_INT_VEC_VFME1); in cptpf_disable_vf_flr_me_intrs()
125 free_irq(vector, cptpf); in cptpf_disable_vf_flr_me_intrs()
168 struct otx2_cptpf_dev *cptpf = arg; in cptpf_vf_flr_intr() local
171 if (cptpf->max_vfs > 64) in cptpf_vf_flr_intr()
175 intr = otx2_cpt_read64(cptpf->reg_base, BLKADDR_RVUM, 0, in cptpf_vf_flr_intr()
184 queue_work(cptpf->flr_wq, &cptpf->flr_work[dev].work); in cptpf_vf_flr_intr()
186 otx2_cpt_write64(cptpf->reg_base, BLKADDR_RVUM, 0, in cptpf_vf_flr_intr()
189 otx2_cpt_write64(cptpf->reg_base, BLKADDR_RVUM, 0, in cptpf_vf_flr_intr()
199 struct otx2_cptpf_dev *cptpf = arg; in cptpf_vf_me_intr() local
203 if (cptpf->max_vfs > 64) in cptpf_vf_me_intr()
207 intr = otx2_cpt_read64(cptpf->reg_base, BLKADDR_RVUM, 0, in cptpf_vf_me_intr()
214 otx2_cpt_write64(cptpf->reg_base, BLKADDR_RVUM, 0, in cptpf_vf_me_intr()
217 otx2_cpt_write64(cptpf->reg_base, BLKADDR_RVUM, 0, in cptpf_vf_me_intr()
224 static void cptpf_unregister_vfpf_intr(struct otx2_cptpf_dev *cptpf, in cptpf_unregister_vfpf_intr() argument
227 cptpf_disable_vfpf_mbox_intr(cptpf, num_vfs); in cptpf_unregister_vfpf_intr()
228 cptpf_disable_vf_flr_me_intrs(cptpf, num_vfs); in cptpf_unregister_vfpf_intr()
231 static int cptpf_register_vfpf_intr(struct otx2_cptpf_dev *cptpf, int num_vfs) in cptpf_register_vfpf_intr() argument
233 struct pci_dev *pdev = cptpf->pdev; in cptpf_register_vfpf_intr()
240 cptpf); in cptpf_register_vfpf_intr()
248 ret = request_irq(vector, cptpf_vf_flr_intr, 0, "CPTPF FLR0", cptpf); in cptpf_register_vfpf_intr()
256 ret = request_irq(vector, cptpf_vf_me_intr, 0, "CPTPF ME0", cptpf); in cptpf_register_vfpf_intr()
266 "CPTVFPF Mbox1", cptpf); in cptpf_register_vfpf_intr()
275 cptpf); in cptpf_register_vfpf_intr()
284 cptpf); in cptpf_register_vfpf_intr()
291 cptpf_enable_vfpf_mbox_intr(cptpf, num_vfs); in cptpf_register_vfpf_intr()
292 cptpf_enable_vf_flr_me_intrs(cptpf, num_vfs); in cptpf_register_vfpf_intr()
298 free_irq(vector, cptpf); in cptpf_register_vfpf_intr()
301 free_irq(vector, cptpf); in cptpf_register_vfpf_intr()
304 free_irq(vector, cptpf); in cptpf_register_vfpf_intr()
307 free_irq(vector, cptpf); in cptpf_register_vfpf_intr()
310 free_irq(vector, cptpf); in cptpf_register_vfpf_intr()
323 static int cptpf_flr_wq_init(struct otx2_cptpf_dev *cptpf, int num_vfs) in cptpf_flr_wq_init() argument
327 cptpf->flr_wq = alloc_ordered_workqueue("cptpf_flr_wq", 0); in cptpf_flr_wq_init()
328 if (!cptpf->flr_wq) in cptpf_flr_wq_init()
331 cptpf->flr_work = kcalloc(num_vfs, sizeof(struct cptpf_flr_work), in cptpf_flr_wq_init()
333 if (!cptpf->flr_work) in cptpf_flr_wq_init()
337 cptpf->flr_work[vf].pf = cptpf; in cptpf_flr_wq_init()
338 INIT_WORK(&cptpf->flr_work[vf].work, cptpf_flr_wq_handler); in cptpf_flr_wq_init()
343 destroy_workqueue(cptpf->flr_wq); in cptpf_flr_wq_init()
347 static int cptpf_vfpf_mbox_init(struct otx2_cptpf_dev *cptpf, int num_vfs) in cptpf_vfpf_mbox_init() argument
349 struct device *dev = &cptpf->pdev->dev; in cptpf_vfpf_mbox_init()
353 cptpf->vfpf_mbox_wq = alloc_workqueue("cpt_vfpf_mailbox", in cptpf_vfpf_mbox_init()
356 if (!cptpf->vfpf_mbox_wq) in cptpf_vfpf_mbox_init()
360 if (test_bit(CN10K_MBOX, &cptpf->cap_flag)) in cptpf_vfpf_mbox_init()
361 vfpf_mbox_base = readq(cptpf->reg_base + RVU_PF_VF_MBOX_ADDR); in cptpf_vfpf_mbox_init()
363 vfpf_mbox_base = readq(cptpf->reg_base + RVU_PF_VF_BAR4_ADDR); in cptpf_vfpf_mbox_init()
370 cptpf->vfpf_mbox_base = devm_ioremap_wc(dev, vfpf_mbox_base, in cptpf_vfpf_mbox_init()
371 MBOX_SIZE * cptpf->max_vfs); in cptpf_vfpf_mbox_init()
372 if (!cptpf->vfpf_mbox_base) { in cptpf_vfpf_mbox_init()
377 err = otx2_mbox_init(&cptpf->vfpf_mbox, cptpf->vfpf_mbox_base, in cptpf_vfpf_mbox_init()
378 cptpf->pdev, cptpf->reg_base, MBOX_DIR_PFVF, in cptpf_vfpf_mbox_init()
384 cptpf->vf[i].vf_id = i; in cptpf_vfpf_mbox_init()
385 cptpf->vf[i].cptpf = cptpf; in cptpf_vfpf_mbox_init()
386 cptpf->vf[i].intr_idx = i % 64; in cptpf_vfpf_mbox_init()
387 INIT_WORK(&cptpf->vf[i].vfpf_mbox_work, in cptpf_vfpf_mbox_init()
393 destroy_workqueue(cptpf->vfpf_mbox_wq); in cptpf_vfpf_mbox_init()
397 static void cptpf_vfpf_mbox_destroy(struct otx2_cptpf_dev *cptpf) in cptpf_vfpf_mbox_destroy() argument
399 destroy_workqueue(cptpf->vfpf_mbox_wq); in cptpf_vfpf_mbox_destroy()
400 otx2_mbox_destroy(&cptpf->vfpf_mbox); in cptpf_vfpf_mbox_destroy()
403 static void cptpf_disable_afpf_mbox_intr(struct otx2_cptpf_dev *cptpf) in cptpf_disable_afpf_mbox_intr() argument
406 otx2_cpt_write64(cptpf->reg_base, BLKADDR_RVUM, 0, RVU_PF_INT_ENA_W1C, in cptpf_disable_afpf_mbox_intr()
409 otx2_cpt_write64(cptpf->reg_base, BLKADDR_RVUM, 0, RVU_PF_INT, 0x1ULL); in cptpf_disable_afpf_mbox_intr()
412 static int cptpf_register_afpf_mbox_intr(struct otx2_cptpf_dev *cptpf) in cptpf_register_afpf_mbox_intr() argument
414 struct pci_dev *pdev = cptpf->pdev; in cptpf_register_afpf_mbox_intr()
421 "CPTAFPF Mbox", cptpf); in cptpf_register_afpf_mbox_intr()
428 otx2_cpt_write64(cptpf->reg_base, BLKADDR_RVUM, 0, RVU_PF_INT, 0x1ULL); in cptpf_register_afpf_mbox_intr()
430 otx2_cpt_write64(cptpf->reg_base, BLKADDR_RVUM, 0, RVU_PF_INT_ENA_W1S, in cptpf_register_afpf_mbox_intr()
433 ret = otx2_cpt_send_ready_msg(&cptpf->afpf_mbox, cptpf->pdev); in cptpf_register_afpf_mbox_intr()
437 cptpf_disable_afpf_mbox_intr(cptpf); in cptpf_register_afpf_mbox_intr()
443 static int cptpf_afpf_mbox_init(struct otx2_cptpf_dev *cptpf) in cptpf_afpf_mbox_init() argument
445 struct pci_dev *pdev = cptpf->pdev; in cptpf_afpf_mbox_init()
449 cptpf->afpf_mbox_wq = alloc_workqueue("cpt_afpf_mailbox", in cptpf_afpf_mbox_init()
452 if (!cptpf->afpf_mbox_wq) in cptpf_afpf_mbox_init()
457 cptpf->afpf_mbox_base = devm_ioremap_wc(&pdev->dev, offset, MBOX_SIZE); in cptpf_afpf_mbox_init()
458 if (!cptpf->afpf_mbox_base) { in cptpf_afpf_mbox_init()
464 err = otx2_mbox_init(&cptpf->afpf_mbox, cptpf->afpf_mbox_base, in cptpf_afpf_mbox_init()
465 pdev, cptpf->reg_base, MBOX_DIR_PFAF, 1); in cptpf_afpf_mbox_init()
469 INIT_WORK(&cptpf->afpf_mbox_work, otx2_cptpf_afpf_mbox_handler); in cptpf_afpf_mbox_init()
473 destroy_workqueue(cptpf->afpf_mbox_wq); in cptpf_afpf_mbox_init()
477 static void cptpf_afpf_mbox_destroy(struct otx2_cptpf_dev *cptpf) in cptpf_afpf_mbox_destroy() argument
479 destroy_workqueue(cptpf->afpf_mbox_wq); in cptpf_afpf_mbox_destroy()
480 otx2_mbox_destroy(&cptpf->afpf_mbox); in cptpf_afpf_mbox_destroy()
486 struct otx2_cptpf_dev *cptpf = dev_get_drvdata(dev); in kvf_limits_show() local
488 return sprintf(buf, "%d\n", cptpf->kvf_limits); in kvf_limits_show()
495 struct otx2_cptpf_dev *cptpf = dev_get_drvdata(dev); in kvf_limits_store() local
508 cptpf->kvf_limits = lfs_num; in kvf_limits_store()
523 static int cpt_is_pf_usable(struct otx2_cptpf_dev *cptpf) in cpt_is_pf_usable() argument
527 rev = otx2_cpt_read64(cptpf->reg_base, BLKADDR_RVUM, 0, in cpt_is_pf_usable()
535 dev_warn(&cptpf->pdev->dev, in cpt_is_pf_usable()
542 static int cptx_device_reset(struct otx2_cptpf_dev *cptpf, int blkaddr) in cptx_device_reset() argument
547 ret = otx2_cpt_write_af_reg(&cptpf->afpf_mbox, cptpf->pdev, in cptx_device_reset()
553 ret = otx2_cpt_read_af_reg(&cptpf->afpf_mbox, cptpf->pdev, in cptx_device_reset()
569 static int cptpf_device_reset(struct otx2_cptpf_dev *cptpf) in cptpf_device_reset() argument
573 if (cptpf->has_cpt1) { in cptpf_device_reset()
574 ret = cptx_device_reset(cptpf, BLKADDR_CPT1); in cptpf_device_reset()
578 return cptx_device_reset(cptpf, BLKADDR_CPT0); in cptpf_device_reset()
581 static void cptpf_check_block_implemented(struct otx2_cptpf_dev *cptpf) in cptpf_check_block_implemented() argument
585 cfg = otx2_cpt_read64(cptpf->reg_base, BLKADDR_RVUM, 0, in cptpf_check_block_implemented()
588 cptpf->has_cpt1 = true; in cptpf_check_block_implemented()
591 static int cptpf_device_init(struct otx2_cptpf_dev *cptpf) in cptpf_device_init() argument
597 cptpf_check_block_implemented(cptpf); in cptpf_device_init()
599 ret = cptpf_device_reset(cptpf); in cptpf_device_init()
604 ret = otx2_cpt_read_af_reg(&cptpf->afpf_mbox, cptpf->pdev, in cptpf_device_init()
610 cptpf->eng_grps.avail.max_se_cnt = af_cnsts1.s.se; in cptpf_device_init()
611 cptpf->eng_grps.avail.max_ie_cnt = af_cnsts1.s.ie; in cptpf_device_init()
612 cptpf->eng_grps.avail.max_ae_cnt = af_cnsts1.s.ae; in cptpf_device_init()
615 ret = otx2_cpt_disable_all_cores(cptpf); in cptpf_device_init()
622 struct otx2_cptpf_dev *cptpf = pci_get_drvdata(pdev); in cptpf_sriov_disable() local
629 cptpf_unregister_vfpf_intr(cptpf, num_vfs); in cptpf_sriov_disable()
630 cptpf_flr_wq_destroy(cptpf); in cptpf_sriov_disable()
631 cptpf_vfpf_mbox_destroy(cptpf); in cptpf_sriov_disable()
633 cptpf->enabled_vfs = 0; in cptpf_sriov_disable()
640 struct otx2_cptpf_dev *cptpf = pci_get_drvdata(pdev); in cptpf_sriov_enable() local
644 ret = cptpf_vfpf_mbox_init(cptpf, num_vfs); in cptpf_sriov_enable()
648 ret = cptpf_flr_wq_init(cptpf, num_vfs); in cptpf_sriov_enable()
652 ret = cptpf_register_vfpf_intr(cptpf, num_vfs); in cptpf_sriov_enable()
657 ret = otx2_cpt_discover_eng_capabilities(cptpf); in cptpf_sriov_enable()
661 ret = otx2_cpt_create_eng_grps(cptpf, &cptpf->eng_grps); in cptpf_sriov_enable()
665 cptpf->enabled_vfs = num_vfs; in cptpf_sriov_enable()
670 dev_notice(&cptpf->pdev->dev, "VFs enabled: %d\n", num_vfs); in cptpf_sriov_enable()
676 cptpf_unregister_vfpf_intr(cptpf, num_vfs); in cptpf_sriov_enable()
677 cptpf->enabled_vfs = 0; in cptpf_sriov_enable()
679 cptpf_flr_wq_destroy(cptpf); in cptpf_sriov_enable()
681 cptpf_vfpf_mbox_destroy(cptpf); in cptpf_sriov_enable()
698 struct otx2_cptpf_dev *cptpf; in otx2_cptpf_probe() local
701 cptpf = devm_kzalloc(dev, sizeof(*cptpf), GFP_KERNEL); in otx2_cptpf_probe()
702 if (!cptpf) in otx2_cptpf_probe()
724 pci_set_drvdata(pdev, cptpf); in otx2_cptpf_probe()
725 cptpf->pdev = pdev; in otx2_cptpf_probe()
727 cptpf->reg_base = pcim_iomap_table(pdev)[PCI_PF_REG_BAR_NUM]; in otx2_cptpf_probe()
730 err = cpt_is_pf_usable(cptpf); in otx2_cptpf_probe()
741 otx2_cpt_set_hw_caps(pdev, &cptpf->cap_flag); in otx2_cptpf_probe()
743 err = cptpf_afpf_mbox_init(cptpf); in otx2_cptpf_probe()
747 err = cptpf_register_afpf_mbox_intr(cptpf); in otx2_cptpf_probe()
751 cptpf->max_vfs = pci_sriov_get_totalvfs(pdev); in otx2_cptpf_probe()
753 err = cn10k_cptpf_lmtst_init(cptpf); in otx2_cptpf_probe()
758 err = cptpf_device_init(cptpf); in otx2_cptpf_probe()
763 err = otx2_cpt_init_eng_grps(pdev, &cptpf->eng_grps); in otx2_cptpf_probe()
773 otx2_cpt_cleanup_eng_grps(pdev, &cptpf->eng_grps); in otx2_cptpf_probe()
775 cptpf_disable_afpf_mbox_intr(cptpf); in otx2_cptpf_probe()
777 cptpf_afpf_mbox_destroy(cptpf); in otx2_cptpf_probe()
785 struct otx2_cptpf_dev *cptpf = pci_get_drvdata(pdev); in otx2_cptpf_remove() local
787 if (!cptpf) in otx2_cptpf_remove()
794 otx2_cpt_cleanup_eng_grps(pdev, &cptpf->eng_grps); in otx2_cptpf_remove()
796 cptpf_disable_afpf_mbox_intr(cptpf); in otx2_cptpf_remove()
798 cptpf_afpf_mbox_destroy(cptpf); in otx2_cptpf_remove()