Lines Matching refs:val32
37 static int edac_pci_read_dword(struct pci_dev *dev, int reg, u32 *val32) in edac_pci_read_dword() argument
41 ret = pci_read_config_dword(dev, reg, val32); in edac_pci_read_dword()
59 static void edac_pci_write_dword(struct pci_dev *dev, int reg, u32 val32) in edac_pci_write_dword() argument
63 ret = pci_write_config_dword(dev, reg, val32); in edac_pci_write_dword()
87 u32 val32; in amd8111_pci_bridge_init() local
93 edac_pci_read_dword(dev, REG_PCI_STSCMD, &val32); in amd8111_pci_bridge_init()
94 if (val32 & PCI_STSCMD_CLEAR_MASK) in amd8111_pci_bridge_init()
95 edac_pci_write_dword(dev, REG_PCI_STSCMD, val32); in amd8111_pci_bridge_init()
98 edac_pci_read_dword(dev, REG_HT_LINK, &val32); in amd8111_pci_bridge_init()
99 if (val32 & HT_LINK_CLEAR_MASK) in amd8111_pci_bridge_init()
100 edac_pci_write_dword(dev, REG_HT_LINK, val32); in amd8111_pci_bridge_init()
105 edac_pci_read_dword(dev, REG_MEM_LIM, &val32); in amd8111_pci_bridge_init()
106 if (val32 & MEM_LIMIT_CLEAR_MASK) in amd8111_pci_bridge_init()
107 edac_pci_write_dword(dev, REG_MEM_LIM, val32); in amd8111_pci_bridge_init()
110 edac_pci_read_dword(dev, REG_PCI_INTBRG_CTRL, &val32); in amd8111_pci_bridge_init()
111 if (val32 & PCI_INTBRG_CTRL_CLEAR_MASK) in amd8111_pci_bridge_init()
112 edac_pci_write_dword(dev, REG_PCI_INTBRG_CTRL, val32); in amd8111_pci_bridge_init()
117 edac_pci_read_dword(dev, REG_PCI_STSCMD, &val32); in amd8111_pci_bridge_init()
118 val32 |= PCI_STSCMD_SERREN; in amd8111_pci_bridge_init()
119 edac_pci_write_dword(dev, REG_PCI_STSCMD, val32); in amd8111_pci_bridge_init()
122 edac_pci_read_dword(dev, REG_HT_LINK, &val32); in amd8111_pci_bridge_init()
123 val32 |= HT_LINK_CRCFEN; in amd8111_pci_bridge_init()
124 edac_pci_write_dword(dev, REG_HT_LINK, val32); in amd8111_pci_bridge_init()
127 edac_pci_read_dword(dev, REG_PCI_INTBRG_CTRL, &val32); in amd8111_pci_bridge_init()
128 val32 |= PCI_INTBRG_CTRL_POLL_MASK; in amd8111_pci_bridge_init()
129 edac_pci_write_dword(dev, REG_PCI_INTBRG_CTRL, val32); in amd8111_pci_bridge_init()
135 u32 val32; in amd8111_pci_bridge_exit() local
140 edac_pci_read_dword(dev, REG_PCI_STSCMD, &val32); in amd8111_pci_bridge_exit()
141 val32 &= ~PCI_STSCMD_SERREN; in amd8111_pci_bridge_exit()
142 edac_pci_write_dword(dev, REG_PCI_STSCMD, val32); in amd8111_pci_bridge_exit()
145 edac_pci_read_dword(dev, REG_HT_LINK, &val32); in amd8111_pci_bridge_exit()
146 val32 &= ~HT_LINK_CRCFEN; in amd8111_pci_bridge_exit()
147 edac_pci_write_dword(dev, REG_HT_LINK, val32); in amd8111_pci_bridge_exit()
150 edac_pci_read_dword(dev, REG_PCI_INTBRG_CTRL, &val32); in amd8111_pci_bridge_exit()
151 val32 &= ~PCI_INTBRG_CTRL_POLL_MASK; in amd8111_pci_bridge_exit()
152 edac_pci_write_dword(dev, REG_PCI_INTBRG_CTRL, val32); in amd8111_pci_bridge_exit()
160 u32 val32; in amd8111_pci_bridge_check() local
163 edac_pci_read_dword(dev, REG_PCI_STSCMD, &val32); in amd8111_pci_bridge_check()
164 if (val32 & PCI_STSCMD_CLEAR_MASK) { in amd8111_pci_bridge_check()
168 (val32 & PCI_STSCMD_SSE) != 0, in amd8111_pci_bridge_check()
169 (val32 & PCI_STSCMD_RMA) != 0, in amd8111_pci_bridge_check()
170 (val32 & PCI_STSCMD_RTA) != 0); in amd8111_pci_bridge_check()
172 val32 |= PCI_STSCMD_CLEAR_MASK; in amd8111_pci_bridge_check()
173 edac_pci_write_dword(dev, REG_PCI_STSCMD, val32); in amd8111_pci_bridge_check()
179 edac_pci_read_dword(dev, REG_HT_LINK, &val32); in amd8111_pci_bridge_check()
180 if (val32 & HT_LINK_LKFAIL) { in amd8111_pci_bridge_check()
184 (val32 & HT_LINK_LKFAIL) != 0); in amd8111_pci_bridge_check()
186 val32 |= HT_LINK_LKFAIL; in amd8111_pci_bridge_check()
187 edac_pci_write_dword(dev, REG_HT_LINK, val32); in amd8111_pci_bridge_check()
193 edac_pci_read_dword(dev, REG_PCI_INTBRG_CTRL, &val32); in amd8111_pci_bridge_check()
194 if (val32 & PCI_INTBRG_CTRL_DTSTAT) { in amd8111_pci_bridge_check()
198 (val32 & PCI_INTBRG_CTRL_DTSTAT) != 0); in amd8111_pci_bridge_check()
200 val32 |= PCI_INTBRG_CTRL_DTSTAT; in amd8111_pci_bridge_check()
201 edac_pci_write_dword(dev, REG_PCI_INTBRG_CTRL, val32); in amd8111_pci_bridge_check()
207 edac_pci_read_dword(dev, REG_MEM_LIM, &val32); in amd8111_pci_bridge_check()
208 if (val32 & MEM_LIMIT_CLEAR_MASK) { in amd8111_pci_bridge_check()
214 (val32 & MEM_LIMIT_DPE) != 0, in amd8111_pci_bridge_check()
215 (val32 & MEM_LIMIT_RSE) != 0, in amd8111_pci_bridge_check()
216 (val32 & MEM_LIMIT_RMA) != 0, in amd8111_pci_bridge_check()
217 (val32 & MEM_LIMIT_RTA) != 0, in amd8111_pci_bridge_check()
218 (val32 & MEM_LIMIT_STA) != 0, in amd8111_pci_bridge_check()
219 (val32 & MEM_LIMIT_MDPE) != 0); in amd8111_pci_bridge_check()
221 val32 |= MEM_LIMIT_CLEAR_MASK; in amd8111_pci_bridge_check()
222 edac_pci_write_dword(dev, REG_MEM_LIM, val32); in amd8111_pci_bridge_check()