Lines Matching refs:reg_write
527 static inline void reg_write(const struct fw_ohci *ohci, int offset, u32 data) in reg_write() function
554 reg_write(ohci, OHCI1394_PhyControl, OHCI1394_PhyControl_Read(addr)); in read_phy_reg()
580 reg_write(ohci, OHCI1394_PhyControl, in write_phy_reg()
672 reg_write(ctx->ohci, CONTROL_SET(ctx->regs), CONTEXT_WAKE); in ar_context_link_page()
694 reg_write(ohci, CONTROL_CLEAR(ctx->regs), CONTEXT_RUN); in ar_context_abort()
1031 reg_write(ctx->ohci, COMMAND_PTR(ctx->regs), ctx->descriptors_bus | 1); in ar_context_run()
1032 reg_write(ctx->ohci, CONTROL_SET(ctx->regs), CONTEXT_RUN); in ar_context_run()
1210 reg_write(ohci, COMMAND_PTR(ctx->regs), in context_run()
1212 reg_write(ohci, CONTROL_CLEAR(ctx->regs), ~0); in context_run()
1213 reg_write(ohci, CONTROL_SET(ctx->regs), CONTEXT_RUN | extra); in context_run()
1260 reg_write(ohci, CONTROL_CLEAR(ctx->regs), CONTEXT_RUN); in context_stop()
1407 reg_write(ohci, CONTROL_SET(ctx->regs), CONTEXT_WAKE); in at_context_queue_packet()
1566 reg_write(ohci, OHCI1394_CSRData, lock_data); in handle_local_lock()
1567 reg_write(ohci, OHCI1394_CSRCompareData, lock_arg); in handle_local_lock()
1568 reg_write(ohci, OHCI1394_CSRControl, sel); in handle_local_lock()
1750 reg_write(ohci, OHCI1394_IntMaskSet, OHCI1394_cycle64Seconds); in update_bus_time()
1898 reg_write(ohci, OHCI1394_LinkControlSet, in bus_reset_work()
2003 reg_write(ohci, OHCI1394_IntEventClear, OHCI1394_busReset); in bus_reset_work()
2032 reg_write(ohci, OHCI1394_BusOptions, in bus_reset_work()
2035 reg_write(ohci, OHCI1394_ConfigROMhdr, in bus_reset_work()
2040 reg_write(ohci, OHCI1394_PhyReqFilterHiSet, ~0); in bus_reset_work()
2041 reg_write(ohci, OHCI1394_PhyReqFilterLoSet, ~0); in bus_reset_work()
2073 reg_write(ohci, OHCI1394_IntEventClear, in irq_handler()
2094 reg_write(ohci, OHCI1394_IsoRecvIntEventClear, iso_event); in irq_handler()
2106 reg_write(ohci, OHCI1394_IsoXmitIntEventClear, iso_event); in irq_handler()
2122 reg_write(ohci, OHCI1394_IntEventClear, in irq_handler()
2131 reg_write(ohci, OHCI1394_LinkControlSet, in irq_handler()
2164 reg_write(ohci, OHCI1394_HCControlSet, OHCI1394_HCControl_softReset); in software_reset()
2230 reg_write(ohci, offset, OHCI1394_HCControl_aPhyEnhanceEnable); in configure_1394a_enhancements()
2233 reg_write(ohci, OHCI1394_HCControlClear, in configure_1394a_enhancements()
2287 reg_write(ohci, OHCI1394_HCControlSet, in ohci_enable()
2313 reg_write(ohci, OHCI1394_HCControlClear, in ohci_enable()
2316 reg_write(ohci, OHCI1394_SelfIDBuffer, ohci->self_id_bus); in ohci_enable()
2317 reg_write(ohci, OHCI1394_LinkControlSet, in ohci_enable()
2321 reg_write(ohci, OHCI1394_ATRetries, in ohci_enable()
2331 reg_write(ohci, OHCI1394_IsoRcvContextControlClear(i), in ohci_enable()
2336 reg_write(ohci, OHCI1394_InitialChannelsAvailableHi, in ohci_enable()
2342 reg_write(ohci, OHCI1394_FairnessControl, 0x3f); in ohci_enable()
2344 reg_write(ohci, OHCI1394_FairnessControl, 0); in ohci_enable()
2347 reg_write(ohci, OHCI1394_PhyUpperBound, FW_MAX_PHYSICAL_RANGE >> 16); in ohci_enable()
2348 reg_write(ohci, OHCI1394_IntEventClear, ~0); in ohci_enable()
2349 reg_write(ohci, OHCI1394_IntMaskClear, ~0); in ohci_enable()
2399 reg_write(ohci, OHCI1394_ConfigROMhdr, 0); in ohci_enable()
2400 reg_write(ohci, OHCI1394_BusOptions, in ohci_enable()
2402 reg_write(ohci, OHCI1394_ConfigROMmap, ohci->next_config_rom_bus); in ohci_enable()
2404 reg_write(ohci, OHCI1394_AsReqFilterHiSet, 0x80000000); in ohci_enable()
2418 reg_write(ohci, OHCI1394_IntMaskSet, irqs); in ohci_enable()
2420 reg_write(ohci, OHCI1394_HCControlSet, in ohci_enable()
2424 reg_write(ohci, OHCI1394_LinkControlSet, in ohci_enable()
2505 reg_write(ohci, OHCI1394_ConfigROMmap, ohci->next_config_rom_bus); in ohci_set_config_rom()
2597 reg_write(ohci, OHCI1394_PhyReqFilterLoSet, 1 << n); in ohci_enable_phys_dma()
2599 reg_write(ohci, OHCI1394_PhyReqFilterHiSet, 1 << (n - 32)); in ohci_enable_phys_dma()
2667 reg_write(ohci, OHCI1394_LinkControlClear, in ohci_write_csr()
2677 reg_write(ohci, OHCI1394_LinkControlSet, in ohci_write_csr()
2686 reg_write(ohci, OHCI1394_NodeID, value >> 16); in ohci_write_csr()
2691 reg_write(ohci, OHCI1394_IsochronousCycleTimer, value); in ohci_write_csr()
2692 reg_write(ohci, OHCI1394_IntEventSet, in ohci_write_csr()
2707 reg_write(ohci, OHCI1394_ATRetries, value); in ohci_write_csr()
2712 reg_write(ohci, OHCI1394_FairnessControl, value & 0x3f); in ohci_write_csr()
2921 reg_write(ohci, OHCI1394_IRMultiChanMaskHiClear, ~hi); in set_multichannel_mask()
2922 reg_write(ohci, OHCI1394_IRMultiChanMaskLoClear, ~lo); in set_multichannel_mask()
2923 reg_write(ohci, OHCI1394_IRMultiChanMaskHiSet, hi); in set_multichannel_mask()
2924 reg_write(ohci, OHCI1394_IRMultiChanMaskLoSet, lo); in set_multichannel_mask()
3046 reg_write(ohci, OHCI1394_IsoXmitIntEventClear, 1 << index); in ohci_start_iso()
3047 reg_write(ohci, OHCI1394_IsoXmitIntMaskSet, 1 << index); in ohci_start_iso()
3062 reg_write(ohci, OHCI1394_IsoRecvIntEventClear, 1 << index); in ohci_start_iso()
3063 reg_write(ohci, OHCI1394_IsoRecvIntMaskSet, 1 << index); in ohci_start_iso()
3064 reg_write(ohci, CONTEXT_MATCH(ctx->context.regs), match); in ohci_start_iso()
3085 reg_write(ohci, OHCI1394_IsoXmitIntMaskClear, 1 << index); in ohci_stop_iso()
3091 reg_write(ohci, OHCI1394_IsoRecvIntMaskClear, 1 << index); in ohci_stop_iso()
3460 reg_write(ctx->ohci, CONTROL_SET(ctx->regs), CONTEXT_WAKE); in ohci_flush_queue_iso()
3654 reg_write(ohci, OHCI1394_IsoRecvIntMaskSet, ~0); in pci_probe()
3657 reg_write(ohci, OHCI1394_IsoRecvIntMaskClear, ~0); in pci_probe()
3663 reg_write(ohci, OHCI1394_IsoXmitIntMaskSet, ~0); in pci_probe()
3670 reg_write(ohci, OHCI1394_IsoXmitIntMaskClear, ~0); in pci_probe()
3754 reg_write(ohci, OHCI1394_IntMaskClear, ~0); in pci_remove()
3829 reg_write(ohci, OHCI1394_GUIDLo, (u32)ohci->card.guid); in pci_resume()
3830 reg_write(ohci, OHCI1394_GUIDHi, (u32)(ohci->card.guid >> 32)); in pci_resume()