Lines Matching refs:hwirq
65 int hwirq; in hlwd_gpio_irqhandler() local
100 for_each_set_bit(hwirq, &pending, 32) in hlwd_gpio_irqhandler()
101 generic_handle_domain_irq(hlwd->gpioc.irq.domain, hwirq); in hlwd_gpio_irqhandler()
111 iowrite32be(BIT(data->hwirq), hlwd->regs + HW_GPIOB_INTFLAG); in hlwd_gpio_irq_ack()
123 mask &= ~BIT(data->hwirq); in hlwd_gpio_irq_mask()
137 mask |= BIT(data->hwirq); in hlwd_gpio_irq_unmask()
148 static void hlwd_gpio_irq_setup_emulation(struct hlwd_gpio *hlwd, int hwirq, in hlwd_gpio_irq_setup_emulation() argument
155 state = ioread32be(hlwd->regs + HW_GPIOB_IN) & BIT(hwirq); in hlwd_gpio_irq_setup_emulation()
156 level &= ~BIT(hwirq); in hlwd_gpio_irq_setup_emulation()
157 level |= state ^ BIT(hwirq); in hlwd_gpio_irq_setup_emulation()
160 hlwd->edge_emulation |= BIT(hwirq); in hlwd_gpio_irq_setup_emulation()
161 hlwd->rising_edge &= ~BIT(hwirq); in hlwd_gpio_irq_setup_emulation()
162 hlwd->falling_edge &= ~BIT(hwirq); in hlwd_gpio_irq_setup_emulation()
164 hlwd->rising_edge |= BIT(hwirq); in hlwd_gpio_irq_setup_emulation()
166 hlwd->falling_edge |= BIT(hwirq); in hlwd_gpio_irq_setup_emulation()
178 hlwd->edge_emulation &= ~BIT(data->hwirq); in hlwd_gpio_irq_set_type()
183 level |= BIT(data->hwirq); in hlwd_gpio_irq_set_type()
188 level &= ~BIT(data->hwirq); in hlwd_gpio_irq_set_type()
194 hlwd_gpio_irq_setup_emulation(hlwd, data->hwirq, flow_type); in hlwd_gpio_irq_set_type()