Lines Matching refs:g
65 struct ixp4xx_gpio *g = gpiochip_get_data(gc); in ixp4xx_gpio_irq_ack() local
67 __raw_writel(BIT(d->hwirq), g->base + IXP4XX_REG_GPIS); in ixp4xx_gpio_irq_ack()
73 struct ixp4xx_gpio *g = gpiochip_get_data(gc); in ixp4xx_gpio_irq_unmask() local
76 if (!(g->irq_edge & BIT(d->hwirq))) in ixp4xx_gpio_irq_unmask()
85 struct ixp4xx_gpio *g = gpiochip_get_data(gc); in ixp4xx_gpio_irq_set_type() local
96 g->irq_edge |= BIT(d->hwirq); in ixp4xx_gpio_irq_set_type()
101 g->irq_edge |= BIT(d->hwirq); in ixp4xx_gpio_irq_set_type()
106 g->irq_edge |= BIT(d->hwirq); in ixp4xx_gpio_irq_set_type()
111 g->irq_edge &= ~BIT(d->hwirq); in ixp4xx_gpio_irq_set_type()
116 g->irq_edge &= ~BIT(d->hwirq); in ixp4xx_gpio_irq_set_type()
131 spin_lock_irqsave(&g->gc.bgpio_lock, flags); in ixp4xx_gpio_irq_set_type()
134 val = __raw_readl(g->base + int_reg); in ixp4xx_gpio_irq_set_type()
136 __raw_writel(val, g->base + int_reg); in ixp4xx_gpio_irq_set_type()
138 __raw_writel(BIT(line), g->base + IXP4XX_REG_GPIS); in ixp4xx_gpio_irq_set_type()
141 val = __raw_readl(g->base + int_reg); in ixp4xx_gpio_irq_set_type()
143 __raw_writel(val, g->base + int_reg); in ixp4xx_gpio_irq_set_type()
146 val = __raw_readl(g->base + IXP4XX_REG_GPOE); in ixp4xx_gpio_irq_set_type()
148 __raw_writel(val, g->base + IXP4XX_REG_GPOE); in ixp4xx_gpio_irq_set_type()
150 spin_unlock_irqrestore(&g->gc.bgpio_lock, flags); in ixp4xx_gpio_irq_set_type()
196 struct ixp4xx_gpio *g; in ixp4xx_gpio_probe() local
200 g = devm_kzalloc(dev, sizeof(*g), GFP_KERNEL); in ixp4xx_gpio_probe()
201 if (!g) in ixp4xx_gpio_probe()
203 g->dev = dev; in ixp4xx_gpio_probe()
206 g->base = devm_ioremap_resource(dev, res); in ixp4xx_gpio_probe()
207 if (IS_ERR(g->base)) in ixp4xx_gpio_probe()
208 return PTR_ERR(g->base); in ixp4xx_gpio_probe()
229 g->fwnode = of_node_to_fwnode(np); in ixp4xx_gpio_probe()
232 g->fwnode = irq_domain_alloc_fwnode(&res->start); in ixp4xx_gpio_probe()
233 if (!g->fwnode) { in ixp4xx_gpio_probe()
244 __raw_writel(0x0, g->base + IXP4XX_REG_GPCLK); in ixp4xx_gpio_probe()
262 ret = bgpio_init(&g->gc, dev, 4, in ixp4xx_gpio_probe()
263 g->base + IXP4XX_REG_GPIN, in ixp4xx_gpio_probe()
264 g->base + IXP4XX_REG_GPOUT, in ixp4xx_gpio_probe()
267 g->base + IXP4XX_REG_GPOE, in ixp4xx_gpio_probe()
273 g->gc.ngpio = 16; in ixp4xx_gpio_probe()
274 g->gc.label = "IXP4XX_GPIO_CHIP"; in ixp4xx_gpio_probe()
280 g->gc.base = 0; in ixp4xx_gpio_probe()
281 g->gc.parent = &pdev->dev; in ixp4xx_gpio_probe()
282 g->gc.owner = THIS_MODULE; in ixp4xx_gpio_probe()
284 girq = &g->gc.irq; in ixp4xx_gpio_probe()
286 girq->fwnode = g->fwnode; in ixp4xx_gpio_probe()
292 ret = devm_gpiochip_add_data(dev, &g->gc, g); in ixp4xx_gpio_probe()
298 platform_set_drvdata(pdev, g); in ixp4xx_gpio_probe()