Lines Matching refs:gs
129 static int mlxbf2_gpio_lock_acquire(struct mlxbf2_gpio_context *gs) in mlxbf2_gpio_lock_acquire() argument
134 spin_lock(&gs->gc.bgpio_lock); in mlxbf2_gpio_lock_acquire()
142 spin_unlock(&gs->gc.bgpio_lock); in mlxbf2_gpio_lock_acquire()
155 static void mlxbf2_gpio_lock_release(struct mlxbf2_gpio_context *gs) in mlxbf2_gpio_lock_release() argument
156 __releases(&gs->gc.bgpio_lock) in mlxbf2_gpio_lock_release()
160 spin_unlock(&gs->gc.bgpio_lock); in mlxbf2_gpio_lock_release()
185 struct mlxbf2_gpio_context *gs = gpiochip_get_data(chip); in mlxbf2_gpio_direction_input() local
192 ret = mlxbf2_gpio_lock_acquire(gs); in mlxbf2_gpio_direction_input()
196 writel(BIT(offset), gs->gpio_io + YU_GPIO_MODE0_CLEAR); in mlxbf2_gpio_direction_input()
197 writel(BIT(offset), gs->gpio_io + YU_GPIO_MODE1_CLEAR); in mlxbf2_gpio_direction_input()
199 mlxbf2_gpio_lock_release(gs); in mlxbf2_gpio_direction_input()
212 struct mlxbf2_gpio_context *gs = gpiochip_get_data(chip); in mlxbf2_gpio_direction_output() local
220 ret = mlxbf2_gpio_lock_acquire(gs); in mlxbf2_gpio_direction_output()
224 writel(BIT(offset), gs->gpio_io + YU_GPIO_MODE1_CLEAR); in mlxbf2_gpio_direction_output()
225 writel(BIT(offset), gs->gpio_io + YU_GPIO_MODE0_SET); in mlxbf2_gpio_direction_output()
227 mlxbf2_gpio_lock_release(gs); in mlxbf2_gpio_direction_output()
235 struct mlxbf2_gpio_context *gs = gpiochip_get_data(gc); in mlxbf2_gpio_irq_enable() local
240 spin_lock_irqsave(&gs->gc.bgpio_lock, flags); in mlxbf2_gpio_irq_enable()
241 val = readl(gs->gpio_io + YU_GPIO_CAUSE_OR_CLRCAUSE); in mlxbf2_gpio_irq_enable()
243 writel(val, gs->gpio_io + YU_GPIO_CAUSE_OR_CLRCAUSE); in mlxbf2_gpio_irq_enable()
245 val = readl(gs->gpio_io + YU_GPIO_CAUSE_OR_EVTEN0); in mlxbf2_gpio_irq_enable()
247 writel(val, gs->gpio_io + YU_GPIO_CAUSE_OR_EVTEN0); in mlxbf2_gpio_irq_enable()
248 spin_unlock_irqrestore(&gs->gc.bgpio_lock, flags); in mlxbf2_gpio_irq_enable()
254 struct mlxbf2_gpio_context *gs = gpiochip_get_data(gc); in mlxbf2_gpio_irq_disable() local
259 spin_lock_irqsave(&gs->gc.bgpio_lock, flags); in mlxbf2_gpio_irq_disable()
260 val = readl(gs->gpio_io + YU_GPIO_CAUSE_OR_EVTEN0); in mlxbf2_gpio_irq_disable()
262 writel(val, gs->gpio_io + YU_GPIO_CAUSE_OR_EVTEN0); in mlxbf2_gpio_irq_disable()
263 spin_unlock_irqrestore(&gs->gc.bgpio_lock, flags); in mlxbf2_gpio_irq_disable()
268 struct mlxbf2_gpio_context *gs = ptr; in mlxbf2_gpio_irq_handler() local
269 struct gpio_chip *gc = &gs->gc; in mlxbf2_gpio_irq_handler()
273 pending = readl(gs->gpio_io + YU_GPIO_CAUSE_OR_CAUSE_EVTEN0); in mlxbf2_gpio_irq_handler()
274 writel(pending, gs->gpio_io + YU_GPIO_CAUSE_OR_CLRCAUSE); in mlxbf2_gpio_irq_handler()
288 struct mlxbf2_gpio_context *gs = gpiochip_get_data(gc); in mlxbf2_gpio_irq_set_type() local
310 spin_lock_irqsave(&gs->gc.bgpio_lock, flags); in mlxbf2_gpio_irq_set_type()
312 val = readl(gs->gpio_io + YU_GPIO_CAUSE_FALL_EN); in mlxbf2_gpio_irq_set_type()
314 writel(val, gs->gpio_io + YU_GPIO_CAUSE_FALL_EN); in mlxbf2_gpio_irq_set_type()
318 val = readl(gs->gpio_io + YU_GPIO_CAUSE_RISE_EN); in mlxbf2_gpio_irq_set_type()
320 writel(val, gs->gpio_io + YU_GPIO_CAUSE_RISE_EN); in mlxbf2_gpio_irq_set_type()
322 spin_unlock_irqrestore(&gs->gc.bgpio_lock, flags); in mlxbf2_gpio_irq_set_type()
331 struct mlxbf2_gpio_context *gs; in mlxbf2_gpio_probe() local
341 gs = devm_kzalloc(dev, sizeof(*gs), GFP_KERNEL); in mlxbf2_gpio_probe()
342 if (!gs) in mlxbf2_gpio_probe()
346 gs->gpio_io = devm_platform_ioremap_resource(pdev, 0); in mlxbf2_gpio_probe()
347 if (IS_ERR(gs->gpio_io)) in mlxbf2_gpio_probe()
348 return PTR_ERR(gs->gpio_io); in mlxbf2_gpio_probe()
359 gc = &gs->gc; in mlxbf2_gpio_probe()
362 gs->gpio_io + YU_GPIO_DATAIN, in mlxbf2_gpio_probe()
363 gs->gpio_io + YU_GPIO_DATASET, in mlxbf2_gpio_probe()
364 gs->gpio_io + YU_GPIO_DATACLEAR, in mlxbf2_gpio_probe()
381 gs->irq_chip.name = name; in mlxbf2_gpio_probe()
382 gs->irq_chip.irq_set_type = mlxbf2_gpio_irq_set_type; in mlxbf2_gpio_probe()
383 gs->irq_chip.irq_enable = mlxbf2_gpio_irq_enable; in mlxbf2_gpio_probe()
384 gs->irq_chip.irq_disable = mlxbf2_gpio_irq_disable; in mlxbf2_gpio_probe()
386 girq = &gs->gc.irq; in mlxbf2_gpio_probe()
387 girq->chip = &gs->irq_chip; in mlxbf2_gpio_probe()
400 IRQF_SHARED, name, gs); in mlxbf2_gpio_probe()
407 platform_set_drvdata(pdev, gs); in mlxbf2_gpio_probe()
409 ret = devm_gpiochip_add_data(dev, &gs->gc, gs); in mlxbf2_gpio_probe()
420 struct mlxbf2_gpio_context *gs = dev_get_drvdata(dev); in mlxbf2_gpio_suspend() local
422 gs->csave_regs->gpio_mode0 = readl(gs->gpio_io + in mlxbf2_gpio_suspend()
424 gs->csave_regs->gpio_mode1 = readl(gs->gpio_io + in mlxbf2_gpio_suspend()
432 struct mlxbf2_gpio_context *gs = dev_get_drvdata(dev); in mlxbf2_gpio_resume() local
434 writel(gs->csave_regs->gpio_mode0, gs->gpio_io + in mlxbf2_gpio_resume()
436 writel(gs->csave_regs->gpio_mode1, gs->gpio_io + in mlxbf2_gpio_resume()