Lines Matching refs:bank
73 static inline void rockchip_gpio_writel(struct rockchip_pin_bank *bank, in rockchip_gpio_writel() argument
76 void __iomem *reg = bank->reg_base + offset; in rockchip_gpio_writel()
78 if (bank->gpio_type == GPIO_TYPE_V2) in rockchip_gpio_writel()
84 static inline u32 rockchip_gpio_readl(struct rockchip_pin_bank *bank, in rockchip_gpio_readl() argument
87 void __iomem *reg = bank->reg_base + offset; in rockchip_gpio_readl()
90 if (bank->gpio_type == GPIO_TYPE_V2) in rockchip_gpio_readl()
98 static inline void rockchip_gpio_writel_bit(struct rockchip_pin_bank *bank, in rockchip_gpio_writel_bit() argument
102 void __iomem *reg = bank->reg_base + offset; in rockchip_gpio_writel_bit()
105 if (bank->gpio_type == GPIO_TYPE_V2) { in rockchip_gpio_writel_bit()
120 static inline u32 rockchip_gpio_readl_bit(struct rockchip_pin_bank *bank, in rockchip_gpio_readl_bit() argument
123 void __iomem *reg = bank->reg_base + offset; in rockchip_gpio_readl_bit()
126 if (bank->gpio_type == GPIO_TYPE_V2) { in rockchip_gpio_readl_bit()
140 struct rockchip_pin_bank *bank = gpiochip_get_data(chip); in rockchip_gpio_get_direction() local
143 data = rockchip_gpio_readl_bit(bank, offset, bank->gpio_regs->port_ddr); in rockchip_gpio_get_direction()
153 struct rockchip_pin_bank *bank = gpiochip_get_data(chip); in rockchip_gpio_set_direction() local
157 raw_spin_lock_irqsave(&bank->slock, flags); in rockchip_gpio_set_direction()
158 rockchip_gpio_writel_bit(bank, offset, data, bank->gpio_regs->port_ddr); in rockchip_gpio_set_direction()
159 raw_spin_unlock_irqrestore(&bank->slock, flags); in rockchip_gpio_set_direction()
167 struct rockchip_pin_bank *bank = gpiochip_get_data(gc); in rockchip_gpio_set() local
170 raw_spin_lock_irqsave(&bank->slock, flags); in rockchip_gpio_set()
171 rockchip_gpio_writel_bit(bank, offset, value, bank->gpio_regs->port_dr); in rockchip_gpio_set()
172 raw_spin_unlock_irqrestore(&bank->slock, flags); in rockchip_gpio_set()
177 struct rockchip_pin_bank *bank = gpiochip_get_data(gc); in rockchip_gpio_get() local
180 data = readl(bank->reg_base + bank->gpio_regs->ext_port); in rockchip_gpio_get()
191 struct rockchip_pin_bank *bank = gpiochip_get_data(gc); in rockchip_gpio_set_debounce() local
192 const struct rockchip_gpio_regs *reg = bank->gpio_regs; in rockchip_gpio_set_debounce()
198 if (bank->gpio_type == GPIO_TYPE_V2 && !IS_ERR(bank->db_clk)) { in rockchip_gpio_set_debounce()
200 freq = clk_get_rate(bank->db_clk); in rockchip_gpio_set_debounce()
211 raw_spin_lock_irqsave(&bank->slock, flags); in rockchip_gpio_set_debounce()
217 cur_div_reg = readl(bank->reg_base + in rockchip_gpio_set_debounce()
220 writel(div_reg, bank->reg_base + in rockchip_gpio_set_debounce()
222 rockchip_gpio_writel_bit(bank, offset, 1, in rockchip_gpio_set_debounce()
226 rockchip_gpio_writel_bit(bank, offset, 1, reg->debounce); in rockchip_gpio_set_debounce()
229 rockchip_gpio_writel_bit(bank, offset, 0, in rockchip_gpio_set_debounce()
232 rockchip_gpio_writel_bit(bank, offset, 0, reg->debounce); in rockchip_gpio_set_debounce()
235 raw_spin_unlock_irqrestore(&bank->slock, flags); in rockchip_gpio_set_debounce()
240 clk_prepare_enable(bank->db_clk); in rockchip_gpio_set_debounce()
242 clk_disable_unprepare(bank->db_clk); in rockchip_gpio_set_debounce()
298 struct rockchip_pin_bank *bank = gpiochip_get_data(gc); in rockchip_gpio_to_irq() local
301 if (!bank->domain) in rockchip_gpio_to_irq()
304 virq = irq_create_mapping(bank->domain, offset); in rockchip_gpio_to_irq()
325 struct rockchip_pin_bank *bank = irq_desc_get_handler_data(desc); in rockchip_irq_demux() local
328 dev_dbg(bank->dev, "got irq for bank %s\n", bank->name); in rockchip_irq_demux()
332 pend = readl_relaxed(bank->reg_base + bank->gpio_regs->int_status); in rockchip_irq_demux()
339 virq = irq_find_mapping(bank->domain, irq); in rockchip_irq_demux()
342 dev_err(bank->dev, "unmapped irq %d\n", irq); in rockchip_irq_demux()
346 dev_dbg(bank->dev, "handling irq %d\n", irq); in rockchip_irq_demux()
352 if (bank->toggle_edge_mode & BIT(irq)) { in rockchip_irq_demux()
356 data = readl_relaxed(bank->reg_base + in rockchip_irq_demux()
357 bank->gpio_regs->ext_port); in rockchip_irq_demux()
359 raw_spin_lock_irqsave(&bank->slock, flags); in rockchip_irq_demux()
361 polarity = readl_relaxed(bank->reg_base + in rockchip_irq_demux()
362 bank->gpio_regs->int_polarity); in rockchip_irq_demux()
368 bank->reg_base + in rockchip_irq_demux()
369 bank->gpio_regs->int_polarity); in rockchip_irq_demux()
371 raw_spin_unlock_irqrestore(&bank->slock, flags); in rockchip_irq_demux()
374 data = readl_relaxed(bank->reg_base + in rockchip_irq_demux()
375 bank->gpio_regs->ext_port); in rockchip_irq_demux()
388 struct rockchip_pin_bank *bank = gc->private; in rockchip_irq_set_type() local
396 raw_spin_lock_irqsave(&bank->slock, flags); in rockchip_irq_set_type()
398 rockchip_gpio_writel_bit(bank, d->hwirq, 0, in rockchip_irq_set_type()
399 bank->gpio_regs->port_ddr); in rockchip_irq_set_type()
401 raw_spin_unlock_irqrestore(&bank->slock, flags); in rockchip_irq_set_type()
408 raw_spin_lock_irqsave(&bank->slock, flags); in rockchip_irq_set_type()
410 level = rockchip_gpio_readl(bank, bank->gpio_regs->int_type); in rockchip_irq_set_type()
411 polarity = rockchip_gpio_readl(bank, bank->gpio_regs->int_polarity); in rockchip_irq_set_type()
415 if (bank->gpio_type == GPIO_TYPE_V2) { in rockchip_irq_set_type()
416 bank->toggle_edge_mode &= ~mask; in rockchip_irq_set_type()
417 rockchip_gpio_writel_bit(bank, d->hwirq, 1, in rockchip_irq_set_type()
418 bank->gpio_regs->int_bothedge); in rockchip_irq_set_type()
421 bank->toggle_edge_mode |= mask; in rockchip_irq_set_type()
428 data = readl(bank->reg_base + bank->gpio_regs->ext_port); in rockchip_irq_set_type()
436 bank->toggle_edge_mode &= ~mask; in rockchip_irq_set_type()
441 bank->toggle_edge_mode &= ~mask; in rockchip_irq_set_type()
446 bank->toggle_edge_mode &= ~mask; in rockchip_irq_set_type()
451 bank->toggle_edge_mode &= ~mask; in rockchip_irq_set_type()
460 rockchip_gpio_writel(bank, level, bank->gpio_regs->int_type); in rockchip_irq_set_type()
461 rockchip_gpio_writel(bank, polarity, bank->gpio_regs->int_polarity); in rockchip_irq_set_type()
463 raw_spin_unlock_irqrestore(&bank->slock, flags); in rockchip_irq_set_type()
471 struct rockchip_pin_bank *bank = gc->private; in rockchip_irq_suspend() local
473 bank->saved_masks = irq_reg_readl(gc, bank->gpio_regs->int_mask); in rockchip_irq_suspend()
474 irq_reg_writel(gc, ~gc->wake_active, bank->gpio_regs->int_mask); in rockchip_irq_suspend()
480 struct rockchip_pin_bank *bank = gc->private; in rockchip_irq_resume() local
482 irq_reg_writel(gc, bank->saved_masks, bank->gpio_regs->int_mask); in rockchip_irq_resume()
495 static int rockchip_interrupts_register(struct rockchip_pin_bank *bank) in rockchip_interrupts_register() argument
501 bank->domain = irq_domain_add_linear(bank->of_node, 32, in rockchip_interrupts_register()
503 if (!bank->domain) { in rockchip_interrupts_register()
504 dev_warn(bank->dev, "could not init irq domain for bank %s\n", in rockchip_interrupts_register()
505 bank->name); in rockchip_interrupts_register()
509 ret = irq_alloc_domain_generic_chips(bank->domain, 32, 1, in rockchip_interrupts_register()
514 dev_err(bank->dev, "could not alloc generic chips for bank %s\n", in rockchip_interrupts_register()
515 bank->name); in rockchip_interrupts_register()
516 irq_domain_remove(bank->domain); in rockchip_interrupts_register()
520 gc = irq_get_domain_generic_chip(bank->domain, 0); in rockchip_interrupts_register()
521 if (bank->gpio_type == GPIO_TYPE_V2) { in rockchip_interrupts_register()
526 gc->reg_base = bank->reg_base; in rockchip_interrupts_register()
527 gc->private = bank; in rockchip_interrupts_register()
528 gc->chip_types[0].regs.mask = bank->gpio_regs->int_mask; in rockchip_interrupts_register()
529 gc->chip_types[0].regs.ack = bank->gpio_regs->port_eoi; in rockchip_interrupts_register()
539 gc->wake_enabled = IRQ_MSK(bank->nr_pins); in rockchip_interrupts_register()
546 rockchip_gpio_writel(bank, 0xffffffff, bank->gpio_regs->int_mask); in rockchip_interrupts_register()
547 rockchip_gpio_writel(bank, 0xffffffff, bank->gpio_regs->port_eoi); in rockchip_interrupts_register()
548 rockchip_gpio_writel(bank, 0xffffffff, bank->gpio_regs->int_en); in rockchip_interrupts_register()
551 irq_set_chained_handler_and_data(bank->irq, in rockchip_interrupts_register()
552 rockchip_irq_demux, bank); in rockchip_interrupts_register()
557 static int rockchip_gpiolib_register(struct rockchip_pin_bank *bank) in rockchip_gpiolib_register() argument
562 bank->gpio_chip = rockchip_gpiolib_chip; in rockchip_gpiolib_register()
564 gc = &bank->gpio_chip; in rockchip_gpiolib_register()
565 gc->base = bank->pin_base; in rockchip_gpiolib_register()
566 gc->ngpio = bank->nr_pins; in rockchip_gpiolib_register()
567 gc->label = bank->name; in rockchip_gpiolib_register()
568 gc->parent = bank->dev; in rockchip_gpiolib_register()
570 gc->of_node = of_node_get(bank->of_node); in rockchip_gpiolib_register()
573 ret = gpiochip_add_data(gc, bank); in rockchip_gpiolib_register()
575 dev_err(bank->dev, "failed to add gpiochip %s, %d\n", in rockchip_gpiolib_register()
590 if (!of_property_read_bool(bank->of_node, "gpio-ranges")) { in rockchip_gpiolib_register()
591 struct device_node *pctlnp = of_get_parent(bank->of_node); in rockchip_gpiolib_register()
604 dev_err(bank->dev, "Failed to add pin range\n"); in rockchip_gpiolib_register()
609 ret = rockchip_interrupts_register(bank); in rockchip_gpiolib_register()
611 dev_err(bank->dev, "failed to register interrupt, %d\n", ret); in rockchip_gpiolib_register()
618 gpiochip_remove(&bank->gpio_chip); in rockchip_gpiolib_register()
623 static int rockchip_get_bank_data(struct rockchip_pin_bank *bank) in rockchip_get_bank_data() argument
628 if (of_address_to_resource(bank->of_node, 0, &res)) { in rockchip_get_bank_data()
629 dev_err(bank->dev, "cannot find IO resource for bank\n"); in rockchip_get_bank_data()
633 bank->reg_base = devm_ioremap_resource(bank->dev, &res); in rockchip_get_bank_data()
634 if (IS_ERR(bank->reg_base)) in rockchip_get_bank_data()
635 return PTR_ERR(bank->reg_base); in rockchip_get_bank_data()
637 bank->irq = irq_of_parse_and_map(bank->of_node, 0); in rockchip_get_bank_data()
638 if (!bank->irq) in rockchip_get_bank_data()
641 bank->clk = of_clk_get(bank->of_node, 0); in rockchip_get_bank_data()
642 if (IS_ERR(bank->clk)) in rockchip_get_bank_data()
643 return PTR_ERR(bank->clk); in rockchip_get_bank_data()
645 clk_prepare_enable(bank->clk); in rockchip_get_bank_data()
646 id = readl(bank->reg_base + gpio_regs_v2.version_id); in rockchip_get_bank_data()
650 bank->gpio_regs = &gpio_regs_v2; in rockchip_get_bank_data()
651 bank->gpio_type = GPIO_TYPE_V2; in rockchip_get_bank_data()
652 bank->db_clk = of_clk_get(bank->of_node, 1); in rockchip_get_bank_data()
653 if (IS_ERR(bank->db_clk)) { in rockchip_get_bank_data()
654 dev_err(bank->dev, "cannot find debounce clk\n"); in rockchip_get_bank_data()
655 clk_disable_unprepare(bank->clk); in rockchip_get_bank_data()
659 bank->gpio_regs = &gpio_regs_v1; in rockchip_get_bank_data()
660 bank->gpio_type = GPIO_TYPE_V1; in rockchip_get_bank_data()
670 struct rockchip_pin_bank *bank; in rockchip_gpio_find_bank() local
674 bank = info->ctrl->pin_banks; in rockchip_gpio_find_bank()
675 for (i = 0; i < info->ctrl->nr_banks; i++, bank++) { in rockchip_gpio_find_bank()
676 if (bank->bank_num == id) { in rockchip_gpio_find_bank()
682 return found ? bank : NULL; in rockchip_gpio_find_bank()
691 struct rockchip_pin_bank *bank = NULL; in rockchip_gpio_probe() local
707 bank = rockchip_gpio_find_bank(pctldev, id); in rockchip_gpio_probe()
708 if (!bank) in rockchip_gpio_probe()
711 bank->dev = dev; in rockchip_gpio_probe()
712 bank->of_node = np; in rockchip_gpio_probe()
714 raw_spin_lock_init(&bank->slock); in rockchip_gpio_probe()
716 ret = rockchip_get_bank_data(bank); in rockchip_gpio_probe()
724 mutex_lock(&bank->deferred_lock); in rockchip_gpio_probe()
726 ret = rockchip_gpiolib_register(bank); in rockchip_gpio_probe()
728 clk_disable_unprepare(bank->clk); in rockchip_gpio_probe()
729 mutex_unlock(&bank->deferred_lock); in rockchip_gpio_probe()
733 while (!list_empty(&bank->deferred_output)) { in rockchip_gpio_probe()
734 cfg = list_first_entry(&bank->deferred_output, in rockchip_gpio_probe()
738 ret = rockchip_gpio_direction_output(&bank->gpio_chip, cfg->pin, cfg->arg); in rockchip_gpio_probe()
745 mutex_unlock(&bank->deferred_lock); in rockchip_gpio_probe()
747 platform_set_drvdata(pdev, bank); in rockchip_gpio_probe()
755 struct rockchip_pin_bank *bank = platform_get_drvdata(pdev); in rockchip_gpio_remove() local
757 clk_disable_unprepare(bank->clk); in rockchip_gpio_remove()
758 gpiochip_remove(&bank->gpio_chip); in rockchip_gpio_remove()