Lines Matching refs:DRM_DEBUG
33 DRM_DEBUG("size_bytes: %u\n", le32_to_cpu(hdr->size_bytes)); in amdgpu_ucode_print_common_hdr()
34 DRM_DEBUG("header_size_bytes: %u\n", le32_to_cpu(hdr->header_size_bytes)); in amdgpu_ucode_print_common_hdr()
35 DRM_DEBUG("header_version_major: %u\n", le16_to_cpu(hdr->header_version_major)); in amdgpu_ucode_print_common_hdr()
36 DRM_DEBUG("header_version_minor: %u\n", le16_to_cpu(hdr->header_version_minor)); in amdgpu_ucode_print_common_hdr()
37 DRM_DEBUG("ip_version_major: %u\n", le16_to_cpu(hdr->ip_version_major)); in amdgpu_ucode_print_common_hdr()
38 DRM_DEBUG("ip_version_minor: %u\n", le16_to_cpu(hdr->ip_version_minor)); in amdgpu_ucode_print_common_hdr()
39 DRM_DEBUG("ucode_version: 0x%08x\n", le32_to_cpu(hdr->ucode_version)); in amdgpu_ucode_print_common_hdr()
40 DRM_DEBUG("ucode_size_bytes: %u\n", le32_to_cpu(hdr->ucode_size_bytes)); in amdgpu_ucode_print_common_hdr()
41 DRM_DEBUG("ucode_array_offset_bytes: %u\n", in amdgpu_ucode_print_common_hdr()
43 DRM_DEBUG("crc32: 0x%08x\n", le32_to_cpu(hdr->crc32)); in amdgpu_ucode_print_common_hdr()
51 DRM_DEBUG("MC\n"); in amdgpu_ucode_print_mc_hdr()
58 DRM_DEBUG("io_debug_size_bytes: %u\n", in amdgpu_ucode_print_mc_hdr()
60 DRM_DEBUG("io_debug_array_offset_bytes: %u\n", in amdgpu_ucode_print_mc_hdr()
75 DRM_DEBUG("SMC\n"); in amdgpu_ucode_print_smc_hdr()
80 DRM_DEBUG("ucode_start_addr: %u\n", le32_to_cpu(v1_0_hdr->ucode_start_addr)); in amdgpu_ucode_print_smc_hdr()
85 DRM_DEBUG("ppt_offset_bytes: %u\n", le32_to_cpu(v2_0_hdr->ppt_offset_bytes)); in amdgpu_ucode_print_smc_hdr()
86 DRM_DEBUG("ppt_size_bytes: %u\n", le32_to_cpu(v2_0_hdr->ppt_size_bytes)); in amdgpu_ucode_print_smc_hdr()
90 DRM_DEBUG("pptable_count: %u\n", le32_to_cpu(v2_1_hdr->pptable_count)); in amdgpu_ucode_print_smc_hdr()
91 DRM_DEBUG("pptable_entry_offset: %u\n", le32_to_cpu(v2_1_hdr->pptable_entry_offset)); in amdgpu_ucode_print_smc_hdr()
107 DRM_DEBUG("GFX\n"); in amdgpu_ucode_print_gfx_hdr()
114 DRM_DEBUG("ucode_feature_version: %u\n", in amdgpu_ucode_print_gfx_hdr()
116 DRM_DEBUG("jt_offset: %u\n", le32_to_cpu(gfx_hdr->jt_offset)); in amdgpu_ucode_print_gfx_hdr()
117 DRM_DEBUG("jt_size: %u\n", le32_to_cpu(gfx_hdr->jt_size)); in amdgpu_ucode_print_gfx_hdr()
128 DRM_DEBUG("RLC\n"); in amdgpu_ucode_print_rlc_hdr()
135 DRM_DEBUG("ucode_feature_version: %u\n", in amdgpu_ucode_print_rlc_hdr()
137 DRM_DEBUG("save_and_restore_offset: %u\n", in amdgpu_ucode_print_rlc_hdr()
139 DRM_DEBUG("clear_state_descriptor_offset: %u\n", in amdgpu_ucode_print_rlc_hdr()
141 DRM_DEBUG("avail_scratch_ram_locations: %u\n", in amdgpu_ucode_print_rlc_hdr()
143 DRM_DEBUG("master_pkt_description_offset: %u\n", in amdgpu_ucode_print_rlc_hdr()
149 DRM_DEBUG("ucode_feature_version: %u\n", in amdgpu_ucode_print_rlc_hdr()
151 DRM_DEBUG("jt_offset: %u\n", le32_to_cpu(rlc_hdr->jt_offset)); in amdgpu_ucode_print_rlc_hdr()
152 DRM_DEBUG("jt_size: %u\n", le32_to_cpu(rlc_hdr->jt_size)); in amdgpu_ucode_print_rlc_hdr()
153 DRM_DEBUG("save_and_restore_offset: %u\n", in amdgpu_ucode_print_rlc_hdr()
155 DRM_DEBUG("clear_state_descriptor_offset: %u\n", in amdgpu_ucode_print_rlc_hdr()
157 DRM_DEBUG("avail_scratch_ram_locations: %u\n", in amdgpu_ucode_print_rlc_hdr()
159 DRM_DEBUG("reg_restore_list_size: %u\n", in amdgpu_ucode_print_rlc_hdr()
161 DRM_DEBUG("reg_list_format_start: %u\n", in amdgpu_ucode_print_rlc_hdr()
163 DRM_DEBUG("reg_list_format_separate_start: %u\n", in amdgpu_ucode_print_rlc_hdr()
165 DRM_DEBUG("starting_offsets_start: %u\n", in amdgpu_ucode_print_rlc_hdr()
167 DRM_DEBUG("reg_list_format_size_bytes: %u\n", in amdgpu_ucode_print_rlc_hdr()
169 DRM_DEBUG("reg_list_format_array_offset_bytes: %u\n", in amdgpu_ucode_print_rlc_hdr()
171 DRM_DEBUG("reg_list_size_bytes: %u\n", in amdgpu_ucode_print_rlc_hdr()
173 DRM_DEBUG("reg_list_array_offset_bytes: %u\n", in amdgpu_ucode_print_rlc_hdr()
175 DRM_DEBUG("reg_list_format_separate_size_bytes: %u\n", in amdgpu_ucode_print_rlc_hdr()
177 DRM_DEBUG("reg_list_format_separate_array_offset_bytes: %u\n", in amdgpu_ucode_print_rlc_hdr()
179 DRM_DEBUG("reg_list_separate_size_bytes: %u\n", in amdgpu_ucode_print_rlc_hdr()
181 DRM_DEBUG("reg_list_separate_array_offset_bytes: %u\n", in amdgpu_ucode_print_rlc_hdr()
186 DRM_DEBUG("reg_list_format_direct_reg_list_length: %u\n", in amdgpu_ucode_print_rlc_hdr()
188 DRM_DEBUG("save_restore_list_cntl_ucode_ver: %u\n", in amdgpu_ucode_print_rlc_hdr()
190 DRM_DEBUG("save_restore_list_cntl_feature_ver: %u\n", in amdgpu_ucode_print_rlc_hdr()
192 DRM_DEBUG("save_restore_list_cntl_size_bytes %u\n", in amdgpu_ucode_print_rlc_hdr()
194 DRM_DEBUG("save_restore_list_cntl_offset_bytes: %u\n", in amdgpu_ucode_print_rlc_hdr()
196 DRM_DEBUG("save_restore_list_gpm_ucode_ver: %u\n", in amdgpu_ucode_print_rlc_hdr()
198 DRM_DEBUG("save_restore_list_gpm_feature_ver: %u\n", in amdgpu_ucode_print_rlc_hdr()
200 DRM_DEBUG("save_restore_list_gpm_size_bytes %u\n", in amdgpu_ucode_print_rlc_hdr()
202 DRM_DEBUG("save_restore_list_gpm_offset_bytes: %u\n", in amdgpu_ucode_print_rlc_hdr()
204 DRM_DEBUG("save_restore_list_srm_ucode_ver: %u\n", in amdgpu_ucode_print_rlc_hdr()
206 DRM_DEBUG("save_restore_list_srm_feature_ver: %u\n", in amdgpu_ucode_print_rlc_hdr()
208 DRM_DEBUG("save_restore_list_srm_size_bytes %u\n", in amdgpu_ucode_print_rlc_hdr()
210 DRM_DEBUG("save_restore_list_srm_offset_bytes: %u\n", in amdgpu_ucode_print_rlc_hdr()
223 DRM_DEBUG("SDMA\n"); in amdgpu_ucode_print_sdma_hdr()
230 DRM_DEBUG("ucode_feature_version: %u\n", in amdgpu_ucode_print_sdma_hdr()
232 DRM_DEBUG("ucode_change_version: %u\n", in amdgpu_ucode_print_sdma_hdr()
234 DRM_DEBUG("jt_offset: %u\n", le32_to_cpu(sdma_hdr->jt_offset)); in amdgpu_ucode_print_sdma_hdr()
235 DRM_DEBUG("jt_size: %u\n", le32_to_cpu(sdma_hdr->jt_size)); in amdgpu_ucode_print_sdma_hdr()
239 DRM_DEBUG("digest_size: %u\n", le32_to_cpu(sdma_v1_1_hdr->digest_size)); in amdgpu_ucode_print_sdma_hdr()
252 DRM_DEBUG("PSP\n"); in amdgpu_ucode_print_psp_hdr()
259 DRM_DEBUG("ucode_feature_version: %u\n", in amdgpu_ucode_print_psp_hdr()
261 DRM_DEBUG("sos_offset_bytes: %u\n", in amdgpu_ucode_print_psp_hdr()
263 DRM_DEBUG("sos_size_bytes: %u\n", in amdgpu_ucode_print_psp_hdr()
268 DRM_DEBUG("toc_header_version: %u\n", in amdgpu_ucode_print_psp_hdr()
270 DRM_DEBUG("toc_offset_bytes: %u\n", in amdgpu_ucode_print_psp_hdr()
272 DRM_DEBUG("toc_size_bytes: %u\n", in amdgpu_ucode_print_psp_hdr()
274 DRM_DEBUG("kdb_header_version: %u\n", in amdgpu_ucode_print_psp_hdr()
276 DRM_DEBUG("kdb_offset_bytes: %u\n", in amdgpu_ucode_print_psp_hdr()
278 DRM_DEBUG("kdb_size_bytes: %u\n", in amdgpu_ucode_print_psp_hdr()
284 DRM_DEBUG("kdb_header_version: %u\n", in amdgpu_ucode_print_psp_hdr()
286 DRM_DEBUG("kdb_offset_bytes: %u\n", in amdgpu_ucode_print_psp_hdr()
288 DRM_DEBUG("kdb_size_bytes: %u\n", in amdgpu_ucode_print_psp_hdr()
296 DRM_DEBUG("toc_header_version: %u\n", in amdgpu_ucode_print_psp_hdr()
298 DRM_DEBUG("toc_offset_bytes: %u\n", in amdgpu_ucode_print_psp_hdr()
300 DRM_DEBUG("toc_size_bytes: %u\n", in amdgpu_ucode_print_psp_hdr()
302 DRM_DEBUG("kdb_header_version: %u\n", in amdgpu_ucode_print_psp_hdr()
304 DRM_DEBUG("kdb_offset_bytes: %u\n", in amdgpu_ucode_print_psp_hdr()
306 DRM_DEBUG("kdb_size_bytes: %u\n", in amdgpu_ucode_print_psp_hdr()
308 DRM_DEBUG("spl_header_version: %u\n", in amdgpu_ucode_print_psp_hdr()
310 DRM_DEBUG("spl_offset_bytes: %u\n", in amdgpu_ucode_print_psp_hdr()
312 DRM_DEBUG("spl_size_bytes: %u\n", in amdgpu_ucode_print_psp_hdr()
326 DRM_DEBUG("GPU_INFO\n"); in amdgpu_ucode_print_gpu_info_hdr()
333 DRM_DEBUG("version_major: %u\n", in amdgpu_ucode_print_gpu_info_hdr()
335 DRM_DEBUG("version_minor: %u\n", in amdgpu_ucode_print_gpu_info_hdr()