Lines Matching refs:v3
557 DIG_ENCODER_CONTROL_PARAMETERS_V3 v3; member
604 args.v3.ucPanelMode = panel_mode; in amdgpu_atombios_encoder_setup_dig_encoder()
636 args.v3.ucAction = action; in amdgpu_atombios_encoder_setup_dig_encoder()
637 args.v3.usPixelClock = cpu_to_le16(amdgpu_encoder->pixel_clock / 10); in amdgpu_atombios_encoder_setup_dig_encoder()
639 args.v3.ucPanelMode = panel_mode; in amdgpu_atombios_encoder_setup_dig_encoder()
641 args.v3.ucEncoderMode = amdgpu_atombios_encoder_get_encoder_mode(encoder); in amdgpu_atombios_encoder_setup_dig_encoder()
643 if (ENCODER_MODE_IS_DP(args.v3.ucEncoderMode)) in amdgpu_atombios_encoder_setup_dig_encoder()
644 args.v3.ucLaneNum = dp_lane_count; in amdgpu_atombios_encoder_setup_dig_encoder()
646 args.v3.ucLaneNum = 8; in amdgpu_atombios_encoder_setup_dig_encoder()
648 args.v3.ucLaneNum = 4; in amdgpu_atombios_encoder_setup_dig_encoder()
650 if (ENCODER_MODE_IS_DP(args.v3.ucEncoderMode) && (dp_clock == 270000)) in amdgpu_atombios_encoder_setup_dig_encoder()
652 args.v3.acConfig.ucDigSel = dig->dig_encoder; in amdgpu_atombios_encoder_setup_dig_encoder()
653 args.v3.ucBitPerColor = amdgpu_atombios_encoder_get_bpc(encoder); in amdgpu_atombios_encoder_setup_dig_encoder()
745 DIG_TRANSMITTER_CONTROL_PARAMETERS_V3 v3; member
928 args.v3.ucAction = action; in amdgpu_atombios_encoder_setup_dig_transmitter()
930 args.v3.usInitInfo = cpu_to_le16(connector_object_id); in amdgpu_atombios_encoder_setup_dig_transmitter()
932 args.v3.asMode.ucLaneSel = lane_num; in amdgpu_atombios_encoder_setup_dig_transmitter()
933 args.v3.asMode.ucLaneSet = lane_set; in amdgpu_atombios_encoder_setup_dig_transmitter()
936 args.v3.usPixelClock = cpu_to_le16(dp_clock / 10); in amdgpu_atombios_encoder_setup_dig_transmitter()
938 args.v3.usPixelClock = cpu_to_le16((amdgpu_encoder->pixel_clock / 2) / 10); in amdgpu_atombios_encoder_setup_dig_transmitter()
940 args.v3.usPixelClock = cpu_to_le16(amdgpu_encoder->pixel_clock / 10); in amdgpu_atombios_encoder_setup_dig_transmitter()
944 args.v3.ucLaneNum = dp_lane_count; in amdgpu_atombios_encoder_setup_dig_transmitter()
946 args.v3.ucLaneNum = 8; in amdgpu_atombios_encoder_setup_dig_transmitter()
948 args.v3.ucLaneNum = 4; in amdgpu_atombios_encoder_setup_dig_transmitter()
951 args.v3.acConfig.ucLinkSel = 1; in amdgpu_atombios_encoder_setup_dig_transmitter()
953 args.v3.acConfig.ucEncoderSel = 1; in amdgpu_atombios_encoder_setup_dig_transmitter()
961 args.v3.acConfig.ucRefClkSource = 2; /* external src */ in amdgpu_atombios_encoder_setup_dig_transmitter()
963 args.v3.acConfig.ucRefClkSource = pll_id; in amdgpu_atombios_encoder_setup_dig_transmitter()
967 args.v3.acConfig.ucTransmitterSel = 0; in amdgpu_atombios_encoder_setup_dig_transmitter()
970 args.v3.acConfig.ucTransmitterSel = 1; in amdgpu_atombios_encoder_setup_dig_transmitter()
973 args.v3.acConfig.ucTransmitterSel = 2; in amdgpu_atombios_encoder_setup_dig_transmitter()
978 args.v3.acConfig.fCoherentMode = 1; /* DP requires coherent */ in amdgpu_atombios_encoder_setup_dig_transmitter()
981 args.v3.acConfig.fCoherentMode = 1; in amdgpu_atombios_encoder_setup_dig_transmitter()
983 args.v3.acConfig.fDualLinkConnector = 1; in amdgpu_atombios_encoder_setup_dig_transmitter()
1210 EXTERNAL_ENCODER_CONTROL_PS_ALLOCATION_V3 v3; member
1275 args.v3.sExtEncoder.ucAction = action; in amdgpu_atombios_encoder_setup_external_encoder()
1277 args.v3.sExtEncoder.usConnectorId = cpu_to_le16(connector_object_id); in amdgpu_atombios_encoder_setup_external_encoder()
1279 args.v3.sExtEncoder.usPixelClock = cpu_to_le16(amdgpu_encoder->pixel_clock / 10); in amdgpu_atombios_encoder_setup_external_encoder()
1280 args.v3.sExtEncoder.ucEncoderMode = in amdgpu_atombios_encoder_setup_external_encoder()
1283 if (ENCODER_MODE_IS_DP(args.v3.sExtEncoder.ucEncoderMode)) { in amdgpu_atombios_encoder_setup_external_encoder()
1285 args.v3.sExtEncoder.ucConfig |= EXTERNAL_ENCODER_CONFIG_V3_DPLINKRATE_2_70GHZ; in amdgpu_atombios_encoder_setup_external_encoder()
1287 args.v3.sExtEncoder.ucConfig |= EXTERNAL_ENCODER_CONFIG_V3_DPLINKRATE_5_40GHZ; in amdgpu_atombios_encoder_setup_external_encoder()
1288 args.v3.sExtEncoder.ucLaneNum = dp_lane_count; in amdgpu_atombios_encoder_setup_external_encoder()
1290 args.v3.sExtEncoder.ucLaneNum = 8; in amdgpu_atombios_encoder_setup_external_encoder()
1292 args.v3.sExtEncoder.ucLaneNum = 4; in amdgpu_atombios_encoder_setup_external_encoder()
1295 args.v3.sExtEncoder.ucConfig |= EXTERNAL_ENCODER_CONFIG_V3_ENCODER1; in amdgpu_atombios_encoder_setup_external_encoder()
1298 args.v3.sExtEncoder.ucConfig |= EXTERNAL_ENCODER_CONFIG_V3_ENCODER2; in amdgpu_atombios_encoder_setup_external_encoder()
1301 args.v3.sExtEncoder.ucConfig |= EXTERNAL_ENCODER_CONFIG_V3_ENCODER3; in amdgpu_atombios_encoder_setup_external_encoder()
1304 args.v3.sExtEncoder.ucBitPerColor = amdgpu_atombios_encoder_get_bpc(encoder); in amdgpu_atombios_encoder_setup_external_encoder()
1453 SELECT_CRTC_SOURCE_PARAMETERS_V3 v3; member
1585 args.v3.ucCRTC = amdgpu_crtc->crtc_id; in amdgpu_atombios_encoder_set_crtc_source()
1600 args.v3.ucDstBpc = amdgpu_atombios_encoder_get_bpc(encoder); in amdgpu_atombios_encoder_set_crtc_source()
1610 args.v3.ucEncoderID = ASIC_INT_DIG1_ENCODER_ID; in amdgpu_atombios_encoder_set_crtc_source()
1613 args.v3.ucEncoderID = ASIC_INT_DIG2_ENCODER_ID; in amdgpu_atombios_encoder_set_crtc_source()
1616 args.v3.ucEncoderID = ASIC_INT_DIG3_ENCODER_ID; in amdgpu_atombios_encoder_set_crtc_source()
1619 args.v3.ucEncoderID = ASIC_INT_DIG4_ENCODER_ID; in amdgpu_atombios_encoder_set_crtc_source()
1622 args.v3.ucEncoderID = ASIC_INT_DIG5_ENCODER_ID; in amdgpu_atombios_encoder_set_crtc_source()
1625 args.v3.ucEncoderID = ASIC_INT_DIG6_ENCODER_ID; in amdgpu_atombios_encoder_set_crtc_source()
1628 args.v3.ucEncoderID = ASIC_INT_DIG7_ENCODER_ID; in amdgpu_atombios_encoder_set_crtc_source()
1633 args.v3.ucEncoderID = ASIC_INT_DVO_ENCODER_ID; in amdgpu_atombios_encoder_set_crtc_source()
1637 args.v3.ucEncoderID = ASIC_INT_TV_ENCODER_ID; in amdgpu_atombios_encoder_set_crtc_source()
1639 args.v3.ucEncoderID = ASIC_INT_TV_ENCODER_ID; in amdgpu_atombios_encoder_set_crtc_source()
1641 args.v3.ucEncoderID = ASIC_INT_DAC1_ENCODER_ID; in amdgpu_atombios_encoder_set_crtc_source()
1645 args.v3.ucEncoderID = ASIC_INT_TV_ENCODER_ID; in amdgpu_atombios_encoder_set_crtc_source()
1647 args.v3.ucEncoderID = ASIC_INT_TV_ENCODER_ID; in amdgpu_atombios_encoder_set_crtc_source()
1649 args.v3.ucEncoderID = ASIC_INT_DAC2_ENCODER_ID; in amdgpu_atombios_encoder_set_crtc_source()