Lines Matching refs:ring
36 static void jpeg_v1_0_ring_begin_use(struct amdgpu_ring *ring);
38 static void jpeg_v1_0_decode_ring_patch_wreg(struct amdgpu_ring *ring, uint32_t *ptr, uint32_t reg_… in jpeg_v1_0_decode_ring_patch_wreg() argument
40 struct amdgpu_device *adev = ring->adev; in jpeg_v1_0_decode_ring_patch_wreg()
41 …ring->ring[(*ptr)++] = PACKETJ(SOC15_REG_OFFSET(JPEG, 0, mmUVD_JRBC_EXTERNAL_REG_BASE), 0, 0, PACK… in jpeg_v1_0_decode_ring_patch_wreg()
44 ring->ring[(*ptr)++] = 0; in jpeg_v1_0_decode_ring_patch_wreg()
45 ring->ring[(*ptr)++] = PACKETJ((reg_offset >> 2), 0, 0, PACKETJ_TYPE0); in jpeg_v1_0_decode_ring_patch_wreg()
47 ring->ring[(*ptr)++] = reg_offset; in jpeg_v1_0_decode_ring_patch_wreg()
48 ring->ring[(*ptr)++] = PACKETJ(0, 0, 0, PACKETJ_TYPE0); in jpeg_v1_0_decode_ring_patch_wreg()
50 ring->ring[(*ptr)++] = val; in jpeg_v1_0_decode_ring_patch_wreg()
53 static void jpeg_v1_0_decode_ring_set_patch_ring(struct amdgpu_ring *ring, uint32_t ptr) in jpeg_v1_0_decode_ring_set_patch_ring() argument
55 struct amdgpu_device *adev = ring->adev; in jpeg_v1_0_decode_ring_set_patch_ring()
62 val = lower_32_bits(ring->gpu_addr); in jpeg_v1_0_decode_ring_set_patch_ring()
63 jpeg_v1_0_decode_ring_patch_wreg(ring, &ptr, reg_offset, val); in jpeg_v1_0_decode_ring_set_patch_ring()
68 val = upper_32_bits(ring->gpu_addr); in jpeg_v1_0_decode_ring_set_patch_ring()
69 jpeg_v1_0_decode_ring_patch_wreg(ring, &ptr, reg_offset, val); in jpeg_v1_0_decode_ring_set_patch_ring()
73 ring->ring[ptr++] = PACKETJ(0, 0, 0, PACKETJ_TYPE2); in jpeg_v1_0_decode_ring_set_patch_ring()
74 ring->ring[ptr++] = 0; in jpeg_v1_0_decode_ring_set_patch_ring()
81 jpeg_v1_0_decode_ring_patch_wreg(ring, &ptr, reg_offset, val); in jpeg_v1_0_decode_ring_set_patch_ring()
87 jpeg_v1_0_decode_ring_patch_wreg(ring, &ptr, reg_offset, val); in jpeg_v1_0_decode_ring_set_patch_ring()
95 …ring->ring[ptr++] = PACKETJ(SOC15_REG_OFFSET(JPEG, 0, mmUVD_JRBC_RB_COND_RD_TIMER), 0, 0, PACKETJ_… in jpeg_v1_0_decode_ring_set_patch_ring()
96 ring->ring[ptr++] = 0x01400200; in jpeg_v1_0_decode_ring_set_patch_ring()
97 …ring->ring[ptr++] = PACKETJ(SOC15_REG_OFFSET(JPEG, 0, mmUVD_JRBC_RB_REF_DATA), 0, 0, PACKETJ_TYPE0… in jpeg_v1_0_decode_ring_set_patch_ring()
98 ring->ring[ptr++] = val; in jpeg_v1_0_decode_ring_set_patch_ring()
99 …ring->ring[ptr++] = PACKETJ(SOC15_REG_OFFSET(JPEG, 0, mmUVD_JRBC_EXTERNAL_REG_BASE), 0, 0, PACKETJ… in jpeg_v1_0_decode_ring_set_patch_ring()
102 ring->ring[ptr++] = 0; in jpeg_v1_0_decode_ring_set_patch_ring()
103 ring->ring[ptr++] = PACKETJ((reg_offset >> 2), 0, 0, PACKETJ_TYPE3); in jpeg_v1_0_decode_ring_set_patch_ring()
105 ring->ring[ptr++] = reg_offset; in jpeg_v1_0_decode_ring_set_patch_ring()
106 ring->ring[ptr++] = PACKETJ(0, 0, 0, PACKETJ_TYPE3); in jpeg_v1_0_decode_ring_set_patch_ring()
108 ring->ring[ptr++] = mask; in jpeg_v1_0_decode_ring_set_patch_ring()
112 ring->ring[ptr++] = PACKETJ(0, 0, 0, PACKETJ_TYPE6); in jpeg_v1_0_decode_ring_set_patch_ring()
113 ring->ring[ptr++] = 0; in jpeg_v1_0_decode_ring_set_patch_ring()
120 jpeg_v1_0_decode_ring_patch_wreg(ring, &ptr, reg_offset, val); in jpeg_v1_0_decode_ring_set_patch_ring()
126 jpeg_v1_0_decode_ring_patch_wreg(ring, &ptr, reg_offset, val); in jpeg_v1_0_decode_ring_set_patch_ring()
136 static uint64_t jpeg_v1_0_decode_ring_get_rptr(struct amdgpu_ring *ring) in jpeg_v1_0_decode_ring_get_rptr() argument
138 struct amdgpu_device *adev = ring->adev; in jpeg_v1_0_decode_ring_get_rptr()
150 static uint64_t jpeg_v1_0_decode_ring_get_wptr(struct amdgpu_ring *ring) in jpeg_v1_0_decode_ring_get_wptr() argument
152 struct amdgpu_device *adev = ring->adev; in jpeg_v1_0_decode_ring_get_wptr()
164 static void jpeg_v1_0_decode_ring_set_wptr(struct amdgpu_ring *ring) in jpeg_v1_0_decode_ring_set_wptr() argument
166 struct amdgpu_device *adev = ring->adev; in jpeg_v1_0_decode_ring_set_wptr()
168 WREG32_SOC15(JPEG, 0, mmUVD_JRBC_RB_WPTR, lower_32_bits(ring->wptr)); in jpeg_v1_0_decode_ring_set_wptr()
178 static void jpeg_v1_0_decode_ring_insert_start(struct amdgpu_ring *ring) in jpeg_v1_0_decode_ring_insert_start() argument
180 struct amdgpu_device *adev = ring->adev; in jpeg_v1_0_decode_ring_insert_start()
182 amdgpu_ring_write(ring, in jpeg_v1_0_decode_ring_insert_start()
184 amdgpu_ring_write(ring, 0x68e04); in jpeg_v1_0_decode_ring_insert_start()
186 amdgpu_ring_write(ring, PACKETJ(0, 0, 0, PACKETJ_TYPE0)); in jpeg_v1_0_decode_ring_insert_start()
187 amdgpu_ring_write(ring, 0x80010000); in jpeg_v1_0_decode_ring_insert_start()
197 static void jpeg_v1_0_decode_ring_insert_end(struct amdgpu_ring *ring) in jpeg_v1_0_decode_ring_insert_end() argument
199 struct amdgpu_device *adev = ring->adev; in jpeg_v1_0_decode_ring_insert_end()
201 amdgpu_ring_write(ring, in jpeg_v1_0_decode_ring_insert_end()
203 amdgpu_ring_write(ring, 0x68e04); in jpeg_v1_0_decode_ring_insert_end()
205 amdgpu_ring_write(ring, PACKETJ(0, 0, 0, PACKETJ_TYPE0)); in jpeg_v1_0_decode_ring_insert_end()
206 amdgpu_ring_write(ring, 0x00010000); in jpeg_v1_0_decode_ring_insert_end()
219 static void jpeg_v1_0_decode_ring_emit_fence(struct amdgpu_ring *ring, u64 addr, u64 seq, in jpeg_v1_0_decode_ring_emit_fence() argument
222 struct amdgpu_device *adev = ring->adev; in jpeg_v1_0_decode_ring_emit_fence()
226 amdgpu_ring_write(ring, in jpeg_v1_0_decode_ring_emit_fence()
228 amdgpu_ring_write(ring, seq); in jpeg_v1_0_decode_ring_emit_fence()
230 amdgpu_ring_write(ring, in jpeg_v1_0_decode_ring_emit_fence()
232 amdgpu_ring_write(ring, seq); in jpeg_v1_0_decode_ring_emit_fence()
234 amdgpu_ring_write(ring, in jpeg_v1_0_decode_ring_emit_fence()
236 amdgpu_ring_write(ring, lower_32_bits(addr)); in jpeg_v1_0_decode_ring_emit_fence()
238 amdgpu_ring_write(ring, in jpeg_v1_0_decode_ring_emit_fence()
240 amdgpu_ring_write(ring, upper_32_bits(addr)); in jpeg_v1_0_decode_ring_emit_fence()
242 amdgpu_ring_write(ring, in jpeg_v1_0_decode_ring_emit_fence()
244 amdgpu_ring_write(ring, 0x8); in jpeg_v1_0_decode_ring_emit_fence()
246 amdgpu_ring_write(ring, in jpeg_v1_0_decode_ring_emit_fence()
248 amdgpu_ring_write(ring, 0); in jpeg_v1_0_decode_ring_emit_fence()
250 amdgpu_ring_write(ring, in jpeg_v1_0_decode_ring_emit_fence()
252 amdgpu_ring_write(ring, 0x01400200); in jpeg_v1_0_decode_ring_emit_fence()
254 amdgpu_ring_write(ring, in jpeg_v1_0_decode_ring_emit_fence()
256 amdgpu_ring_write(ring, seq); in jpeg_v1_0_decode_ring_emit_fence()
258 amdgpu_ring_write(ring, in jpeg_v1_0_decode_ring_emit_fence()
260 amdgpu_ring_write(ring, lower_32_bits(addr)); in jpeg_v1_0_decode_ring_emit_fence()
262 amdgpu_ring_write(ring, in jpeg_v1_0_decode_ring_emit_fence()
264 amdgpu_ring_write(ring, upper_32_bits(addr)); in jpeg_v1_0_decode_ring_emit_fence()
266 amdgpu_ring_write(ring, in jpeg_v1_0_decode_ring_emit_fence()
268 amdgpu_ring_write(ring, 0xffffffff); in jpeg_v1_0_decode_ring_emit_fence()
270 amdgpu_ring_write(ring, in jpeg_v1_0_decode_ring_emit_fence()
272 amdgpu_ring_write(ring, 0x3fbc); in jpeg_v1_0_decode_ring_emit_fence()
274 amdgpu_ring_write(ring, in jpeg_v1_0_decode_ring_emit_fence()
276 amdgpu_ring_write(ring, 0x1); in jpeg_v1_0_decode_ring_emit_fence()
279 amdgpu_ring_write(ring, PACKETJ(0, 0, 0, PACKETJ_TYPE7)); in jpeg_v1_0_decode_ring_emit_fence()
280 amdgpu_ring_write(ring, 0); in jpeg_v1_0_decode_ring_emit_fence()
293 static void jpeg_v1_0_decode_ring_emit_ib(struct amdgpu_ring *ring, in jpeg_v1_0_decode_ring_emit_ib() argument
298 struct amdgpu_device *adev = ring->adev; in jpeg_v1_0_decode_ring_emit_ib()
301 amdgpu_ring_write(ring, in jpeg_v1_0_decode_ring_emit_ib()
303 amdgpu_ring_write(ring, (vmid | (vmid << 4))); in jpeg_v1_0_decode_ring_emit_ib()
305 amdgpu_ring_write(ring, in jpeg_v1_0_decode_ring_emit_ib()
307 amdgpu_ring_write(ring, (vmid | (vmid << 4))); in jpeg_v1_0_decode_ring_emit_ib()
309 amdgpu_ring_write(ring, in jpeg_v1_0_decode_ring_emit_ib()
311 amdgpu_ring_write(ring, lower_32_bits(ib->gpu_addr)); in jpeg_v1_0_decode_ring_emit_ib()
313 amdgpu_ring_write(ring, in jpeg_v1_0_decode_ring_emit_ib()
315 amdgpu_ring_write(ring, upper_32_bits(ib->gpu_addr)); in jpeg_v1_0_decode_ring_emit_ib()
317 amdgpu_ring_write(ring, in jpeg_v1_0_decode_ring_emit_ib()
319 amdgpu_ring_write(ring, ib->length_dw); in jpeg_v1_0_decode_ring_emit_ib()
321 amdgpu_ring_write(ring, in jpeg_v1_0_decode_ring_emit_ib()
323 amdgpu_ring_write(ring, lower_32_bits(ring->gpu_addr)); in jpeg_v1_0_decode_ring_emit_ib()
325 amdgpu_ring_write(ring, in jpeg_v1_0_decode_ring_emit_ib()
327 amdgpu_ring_write(ring, upper_32_bits(ring->gpu_addr)); in jpeg_v1_0_decode_ring_emit_ib()
329 amdgpu_ring_write(ring, in jpeg_v1_0_decode_ring_emit_ib()
331 amdgpu_ring_write(ring, 0); in jpeg_v1_0_decode_ring_emit_ib()
333 amdgpu_ring_write(ring, in jpeg_v1_0_decode_ring_emit_ib()
335 amdgpu_ring_write(ring, 0x01400200); in jpeg_v1_0_decode_ring_emit_ib()
337 amdgpu_ring_write(ring, in jpeg_v1_0_decode_ring_emit_ib()
339 amdgpu_ring_write(ring, 0x2); in jpeg_v1_0_decode_ring_emit_ib()
341 amdgpu_ring_write(ring, in jpeg_v1_0_decode_ring_emit_ib()
343 amdgpu_ring_write(ring, 0x2); in jpeg_v1_0_decode_ring_emit_ib()
346 static void jpeg_v1_0_decode_ring_emit_reg_wait(struct amdgpu_ring *ring, in jpeg_v1_0_decode_ring_emit_reg_wait() argument
350 struct amdgpu_device *adev = ring->adev; in jpeg_v1_0_decode_ring_emit_reg_wait()
353 amdgpu_ring_write(ring, in jpeg_v1_0_decode_ring_emit_reg_wait()
355 amdgpu_ring_write(ring, 0x01400200); in jpeg_v1_0_decode_ring_emit_reg_wait()
357 amdgpu_ring_write(ring, in jpeg_v1_0_decode_ring_emit_reg_wait()
359 amdgpu_ring_write(ring, val); in jpeg_v1_0_decode_ring_emit_reg_wait()
361 amdgpu_ring_write(ring, in jpeg_v1_0_decode_ring_emit_reg_wait()
365 amdgpu_ring_write(ring, 0); in jpeg_v1_0_decode_ring_emit_reg_wait()
366 amdgpu_ring_write(ring, in jpeg_v1_0_decode_ring_emit_reg_wait()
369 amdgpu_ring_write(ring, reg_offset); in jpeg_v1_0_decode_ring_emit_reg_wait()
370 amdgpu_ring_write(ring, in jpeg_v1_0_decode_ring_emit_reg_wait()
373 amdgpu_ring_write(ring, mask); in jpeg_v1_0_decode_ring_emit_reg_wait()
376 static void jpeg_v1_0_decode_ring_emit_vm_flush(struct amdgpu_ring *ring, in jpeg_v1_0_decode_ring_emit_vm_flush() argument
379 struct amdgpu_vmhub *hub = &ring->adev->vmhub[ring->funcs->vmhub]; in jpeg_v1_0_decode_ring_emit_vm_flush()
382 pd_addr = amdgpu_gmc_emit_flush_gpu_tlb(ring, vmid, pd_addr); in jpeg_v1_0_decode_ring_emit_vm_flush()
388 jpeg_v1_0_decode_ring_emit_reg_wait(ring, data0, data1, mask); in jpeg_v1_0_decode_ring_emit_vm_flush()
391 static void jpeg_v1_0_decode_ring_emit_wreg(struct amdgpu_ring *ring, in jpeg_v1_0_decode_ring_emit_wreg() argument
394 struct amdgpu_device *adev = ring->adev; in jpeg_v1_0_decode_ring_emit_wreg()
397 amdgpu_ring_write(ring, in jpeg_v1_0_decode_ring_emit_wreg()
401 amdgpu_ring_write(ring, 0); in jpeg_v1_0_decode_ring_emit_wreg()
402 amdgpu_ring_write(ring, in jpeg_v1_0_decode_ring_emit_wreg()
405 amdgpu_ring_write(ring, reg_offset); in jpeg_v1_0_decode_ring_emit_wreg()
406 amdgpu_ring_write(ring, in jpeg_v1_0_decode_ring_emit_wreg()
409 amdgpu_ring_write(ring, val); in jpeg_v1_0_decode_ring_emit_wreg()
412 static void jpeg_v1_0_decode_ring_nop(struct amdgpu_ring *ring, uint32_t count) in jpeg_v1_0_decode_ring_nop() argument
416 WARN_ON(ring->wptr % 2 || count % 2); in jpeg_v1_0_decode_ring_nop()
419 amdgpu_ring_write(ring, PACKETJ(0, 0, 0, PACKETJ_TYPE6)); in jpeg_v1_0_decode_ring_nop()
420 amdgpu_ring_write(ring, 0); in jpeg_v1_0_decode_ring_nop()
479 struct amdgpu_ring *ring; in jpeg_v1_0_sw_init() local
487 ring = &adev->jpeg.inst->ring_dec; in jpeg_v1_0_sw_init()
488 sprintf(ring->name, "jpeg_dec"); in jpeg_v1_0_sw_init()
489 r = amdgpu_ring_init(adev, ring, 512, &adev->jpeg.inst->irq, in jpeg_v1_0_sw_init()
524 struct amdgpu_ring *ring = &adev->jpeg.inst->ring_dec; in jpeg_v1_0_start() local
530 WREG32_SOC15(JPEG, 0, mmUVD_LMI_JRBC_RB_64BIT_BAR_LOW, lower_32_bits(ring->gpu_addr)); in jpeg_v1_0_start()
531 WREG32_SOC15(JPEG, 0, mmUVD_LMI_JRBC_RB_64BIT_BAR_HIGH, upper_32_bits(ring->gpu_addr)); in jpeg_v1_0_start()
538 ring->wptr = RREG32_SOC15(JPEG, 0, mmUVD_JRBC_RB_WPTR); in jpeg_v1_0_start()
541 jpeg_v1_0_decode_ring_set_patch_ring(ring, in jpeg_v1_0_start()
542 (ring->wptr + ring->max_dw * amdgpu_sched_hw_submission)); in jpeg_v1_0_start()
596 static void jpeg_v1_0_ring_begin_use(struct amdgpu_ring *ring) in jpeg_v1_0_ring_begin_use() argument
598 struct amdgpu_device *adev = ring->adev; in jpeg_v1_0_ring_begin_use()
612 vcn_v1_0_set_pg_for_begin_use(ring, set_clocks); in jpeg_v1_0_ring_begin_use()