Lines Matching refs:dsc_cfg
97 const struct drm_dsc_config *dsc_cfg) in drm_dsc_pps_payload_pack() argument
109 dsc_cfg->dsc_version_minor | in drm_dsc_pps_payload_pack()
110 dsc_cfg->dsc_version_major << DSC_PPS_VERSION_MAJOR_SHIFT; in drm_dsc_pps_payload_pack()
116 dsc_cfg->line_buf_depth | in drm_dsc_pps_payload_pack()
117 dsc_cfg->bits_per_component << DSC_PPS_BPC_SHIFT; in drm_dsc_pps_payload_pack()
121 ((dsc_cfg->bits_per_pixel & DSC_PPS_BPP_HIGH_MASK) >> in drm_dsc_pps_payload_pack()
123 dsc_cfg->vbr_enable << DSC_PPS_VBR_EN_SHIFT | in drm_dsc_pps_payload_pack()
124 dsc_cfg->simple_422 << DSC_PPS_SIMPLE422_SHIFT | in drm_dsc_pps_payload_pack()
125 dsc_cfg->convert_rgb << DSC_PPS_CONVERT_RGB_SHIFT | in drm_dsc_pps_payload_pack()
126 dsc_cfg->block_pred_enable << DSC_PPS_BLOCK_PRED_EN_SHIFT; in drm_dsc_pps_payload_pack()
130 (dsc_cfg->bits_per_pixel & DSC_PPS_LSB_MASK); in drm_dsc_pps_payload_pack()
140 pps_payload->pic_height = cpu_to_be16(dsc_cfg->pic_height); in drm_dsc_pps_payload_pack()
143 pps_payload->pic_width = cpu_to_be16(dsc_cfg->pic_width); in drm_dsc_pps_payload_pack()
146 pps_payload->slice_height = cpu_to_be16(dsc_cfg->slice_height); in drm_dsc_pps_payload_pack()
149 pps_payload->slice_width = cpu_to_be16(dsc_cfg->slice_width); in drm_dsc_pps_payload_pack()
152 pps_payload->chunk_size = cpu_to_be16(dsc_cfg->slice_chunk_size); in drm_dsc_pps_payload_pack()
156 ((dsc_cfg->initial_xmit_delay & in drm_dsc_pps_payload_pack()
162 (dsc_cfg->initial_xmit_delay & DSC_PPS_LSB_MASK); in drm_dsc_pps_payload_pack()
166 cpu_to_be16(dsc_cfg->initial_dec_delay); in drm_dsc_pps_payload_pack()
172 dsc_cfg->initial_scale_value; in drm_dsc_pps_payload_pack()
176 cpu_to_be16(dsc_cfg->scale_increment_interval); in drm_dsc_pps_payload_pack()
180 ((dsc_cfg->scale_decrement_interval & in drm_dsc_pps_payload_pack()
186 (dsc_cfg->scale_decrement_interval & DSC_PPS_LSB_MASK); in drm_dsc_pps_payload_pack()
192 dsc_cfg->first_line_bpg_offset; in drm_dsc_pps_payload_pack()
196 cpu_to_be16(dsc_cfg->nfl_bpg_offset); in drm_dsc_pps_payload_pack()
200 cpu_to_be16(dsc_cfg->slice_bpg_offset); in drm_dsc_pps_payload_pack()
204 cpu_to_be16(dsc_cfg->initial_offset); in drm_dsc_pps_payload_pack()
207 pps_payload->final_offset = cpu_to_be16(dsc_cfg->final_offset); in drm_dsc_pps_payload_pack()
210 pps_payload->flatness_min_qp = dsc_cfg->flatness_min_qp; in drm_dsc_pps_payload_pack()
213 pps_payload->flatness_max_qp = dsc_cfg->flatness_max_qp; in drm_dsc_pps_payload_pack()
216 pps_payload->rc_model_size = cpu_to_be16(dsc_cfg->rc_model_size); in drm_dsc_pps_payload_pack()
223 dsc_cfg->rc_quant_incr_limit0; in drm_dsc_pps_payload_pack()
227 dsc_cfg->rc_quant_incr_limit1; in drm_dsc_pps_payload_pack()
236 dsc_cfg->rc_buf_thresh[i]; in drm_dsc_pps_payload_pack()
245 cpu_to_be16((dsc_cfg->rc_range_params[i].range_min_qp << in drm_dsc_pps_payload_pack()
247 (dsc_cfg->rc_range_params[i].range_max_qp << in drm_dsc_pps_payload_pack()
249 (dsc_cfg->rc_range_params[i].range_bpg_offset)); in drm_dsc_pps_payload_pack()
253 pps_payload->native_422_420 = dsc_cfg->native_422 | in drm_dsc_pps_payload_pack()
254 dsc_cfg->native_420 << DSC_PPS_NATIVE_420_SHIFT; in drm_dsc_pps_payload_pack()
258 dsc_cfg->second_line_bpg_offset; in drm_dsc_pps_payload_pack()
262 cpu_to_be16(dsc_cfg->nsl_bpg_offset); in drm_dsc_pps_payload_pack()
266 cpu_to_be16(dsc_cfg->second_line_offset_adj); in drm_dsc_pps_payload_pack()