Lines Matching refs:REG_WRITE
35 REG_WRITE(vga_reg, VGA_DISP_DISABLE); in cdv_disable_vga()
137 REG_WRITE(BLC_PWM_CTL, (blc_pwm_ctl | in cdv_set_brightness()
325 REG_WRITE(DSPCLK_GATE_D, regs->cdv.saveDSPCLK_GATE_D); in cdv_restore_display_registers()
326 REG_WRITE(RAMCLK_GATE_D, regs->cdv.saveRAMCLK_GATE_D); in cdv_restore_display_registers()
329 REG_WRITE(DPIO_CFG, 0); in cdv_restore_display_registers()
330 REG_WRITE(DPIO_CFG, DPIO_MODE_SELECT_0 | DPIO_CMN_RESET_N); in cdv_restore_display_registers()
334 REG_WRITE(DPLL_A, temp | DPLL_SYNCLOCK_ENABLE); in cdv_restore_display_registers()
340 REG_WRITE(DPLL_B, temp | DPLL_SYNCLOCK_ENABLE); in cdv_restore_display_registers()
346 REG_WRITE(DSPFW1, regs->cdv.saveDSPFW[0]); in cdv_restore_display_registers()
347 REG_WRITE(DSPFW2, regs->cdv.saveDSPFW[1]); in cdv_restore_display_registers()
348 REG_WRITE(DSPFW3, regs->cdv.saveDSPFW[2]); in cdv_restore_display_registers()
349 REG_WRITE(DSPFW4, regs->cdv.saveDSPFW[3]); in cdv_restore_display_registers()
350 REG_WRITE(DSPFW5, regs->cdv.saveDSPFW[4]); in cdv_restore_display_registers()
351 REG_WRITE(DSPFW6, regs->cdv.saveDSPFW[5]); in cdv_restore_display_registers()
353 REG_WRITE(DSPARB, regs->cdv.saveDSPARB); in cdv_restore_display_registers()
354 REG_WRITE(ADPA, regs->cdv.saveADPA); in cdv_restore_display_registers()
356 REG_WRITE(BLC_PWM_CTL2, regs->saveBLC_PWM_CTL2); in cdv_restore_display_registers()
357 REG_WRITE(LVDS, regs->cdv.saveLVDS); in cdv_restore_display_registers()
358 REG_WRITE(PFIT_CONTROL, regs->cdv.savePFIT_CONTROL); in cdv_restore_display_registers()
359 REG_WRITE(PFIT_PGM_RATIOS, regs->cdv.savePFIT_PGM_RATIOS); in cdv_restore_display_registers()
360 REG_WRITE(BLC_PWM_CTL, regs->saveBLC_PWM_CTL); in cdv_restore_display_registers()
361 REG_WRITE(PP_ON_DELAYS, regs->cdv.savePP_ON_DELAYS); in cdv_restore_display_registers()
362 REG_WRITE(PP_OFF_DELAYS, regs->cdv.savePP_OFF_DELAYS); in cdv_restore_display_registers()
363 REG_WRITE(PP_CYCLE, regs->cdv.savePP_CYCLE); in cdv_restore_display_registers()
364 REG_WRITE(PP_CONTROL, regs->cdv.savePP_CONTROL); in cdv_restore_display_registers()
366 REG_WRITE(VGACNTRL, regs->cdv.saveVGACNTRL); in cdv_restore_display_registers()
368 REG_WRITE(PSB_INT_ENABLE_R, regs->cdv.saveIER); in cdv_restore_display_registers()
369 REG_WRITE(PSB_INT_MASK_R, regs->cdv.saveIMR); in cdv_restore_display_registers()
445 REG_WRITE(PORT_HOTPLUG_STAT, REG_READ(PORT_HOTPLUG_STAT)); in cdv_hotplug_event()
455 REG_WRITE(PORT_HOTPLUG_EN, hotplug); in cdv_hotplug_enable()
457 REG_WRITE(PORT_HOTPLUG_EN, 0); in cdv_hotplug_enable()
458 REG_WRITE(PORT_HOTPLUG_STAT, REG_READ(PORT_HOTPLUG_STAT)); in cdv_hotplug_enable()