Lines Matching refs:min_cdclk

467 static int vlv_calc_cdclk(struct drm_i915_private *dev_priv, int min_cdclk)  in vlv_calc_cdclk()  argument
477 if (IS_VALLEYVIEW(dev_priv) && min_cdclk > freq_320) in vlv_calc_cdclk()
479 else if (min_cdclk > 266667) in vlv_calc_cdclk()
481 else if (min_cdclk > 0) in vlv_calc_cdclk()
706 static int bdw_calc_cdclk(int min_cdclk) in bdw_calc_cdclk() argument
708 if (min_cdclk > 540000) in bdw_calc_cdclk()
710 else if (min_cdclk > 450000) in bdw_calc_cdclk()
712 else if (min_cdclk > 337500) in bdw_calc_cdclk()
831 static int skl_calc_cdclk(int min_cdclk, int vco) in skl_calc_cdclk() argument
834 if (min_cdclk > 540000) in skl_calc_cdclk()
836 else if (min_cdclk > 432000) in skl_calc_cdclk()
838 else if (min_cdclk > 308571) in skl_calc_cdclk()
843 if (min_cdclk > 540000) in skl_calc_cdclk()
845 else if (min_cdclk > 450000) in skl_calc_cdclk()
847 else if (min_cdclk > 337500) in skl_calc_cdclk()
1324 static int bxt_calc_cdclk(struct drm_i915_private *dev_priv, int min_cdclk) in bxt_calc_cdclk() argument
1331 table[i].cdclk >= min_cdclk) in bxt_calc_cdclk()
1336 min_cdclk, dev_priv->cdclk.hw.ref); in bxt_calc_cdclk()
2095 int min_cdclk = 0; in intel_planes_min_cdclk() local
2098 min_cdclk = max(crtc_state->min_cdclk[plane->id], min_cdclk); in intel_planes_min_cdclk()
2100 return min_cdclk; in intel_planes_min_cdclk()
2107 int min_cdclk; in intel_crtc_compute_min_cdclk() local
2112 min_cdclk = intel_pixel_rate_to_cdclk(crtc_state); in intel_crtc_compute_min_cdclk()
2116 min_cdclk = DIV_ROUND_UP(min_cdclk * 100, 95); in intel_crtc_compute_min_cdclk()
2129 min_cdclk = max(316800, min_cdclk); in intel_crtc_compute_min_cdclk()
2132 min_cdclk = max(432000, min_cdclk); in intel_crtc_compute_min_cdclk()
2141 min_cdclk = max(2 * 96000, min_cdclk); in intel_crtc_compute_min_cdclk()
2152 min_cdclk = max(crtc_state->port_clock, min_cdclk); in intel_crtc_compute_min_cdclk()
2160 min_cdclk = max(320000, min_cdclk); in intel_crtc_compute_min_cdclk()
2169 min_cdclk = max(158400, min_cdclk); in intel_crtc_compute_min_cdclk()
2172 min_cdclk = max(intel_planes_min_cdclk(crtc_state), min_cdclk); in intel_crtc_compute_min_cdclk()
2180 min_cdclk = max(min_cdclk, (int)crtc_state->pixel_rate); in intel_crtc_compute_min_cdclk()
2196 min_cdclk = max_t(int, min_cdclk, in intel_crtc_compute_min_cdclk()
2201 if (min_cdclk > dev_priv->max_cdclk_freq) { in intel_crtc_compute_min_cdclk()
2204 min_cdclk, dev_priv->max_cdclk_freq); in intel_crtc_compute_min_cdclk()
2208 return min_cdclk; in intel_crtc_compute_min_cdclk()
2218 int min_cdclk, i; in intel_compute_min_cdclk() local
2224 min_cdclk = intel_crtc_compute_min_cdclk(crtc_state); in intel_compute_min_cdclk()
2225 if (min_cdclk < 0) in intel_compute_min_cdclk()
2226 return min_cdclk; in intel_compute_min_cdclk()
2232 if (cdclk_state->min_cdclk[crtc->pipe] == min_cdclk) in intel_compute_min_cdclk()
2235 cdclk_state->min_cdclk[crtc->pipe] = min_cdclk; in intel_compute_min_cdclk()
2242 min_cdclk = cdclk_state->force_min_cdclk; in intel_compute_min_cdclk()
2244 min_cdclk = max(cdclk_state->min_cdclk[pipe], min_cdclk); in intel_compute_min_cdclk()
2249 min_cdclk = max(bw_state->min_cdclk, min_cdclk); in intel_compute_min_cdclk()
2252 return min_cdclk; in intel_compute_min_cdclk()
2308 int min_cdclk, cdclk; in vlv_modeset_calc_cdclk() local
2310 min_cdclk = intel_compute_min_cdclk(cdclk_state); in vlv_modeset_calc_cdclk()
2311 if (min_cdclk < 0) in vlv_modeset_calc_cdclk()
2312 return min_cdclk; in vlv_modeset_calc_cdclk()
2314 cdclk = vlv_calc_cdclk(dev_priv, min_cdclk); in vlv_modeset_calc_cdclk()
2335 int min_cdclk, cdclk; in bdw_modeset_calc_cdclk() local
2337 min_cdclk = intel_compute_min_cdclk(cdclk_state); in bdw_modeset_calc_cdclk()
2338 if (min_cdclk < 0) in bdw_modeset_calc_cdclk()
2339 return min_cdclk; in bdw_modeset_calc_cdclk()
2345 cdclk = bdw_calc_cdclk(min_cdclk); in bdw_modeset_calc_cdclk()
2403 int min_cdclk, cdclk, vco; in skl_modeset_calc_cdclk() local
2405 min_cdclk = intel_compute_min_cdclk(cdclk_state); in skl_modeset_calc_cdclk()
2406 if (min_cdclk < 0) in skl_modeset_calc_cdclk()
2407 return min_cdclk; in skl_modeset_calc_cdclk()
2415 cdclk = skl_calc_cdclk(min_cdclk, vco); in skl_modeset_calc_cdclk()
2440 int min_cdclk, min_voltage_level, cdclk, vco; in bxt_modeset_calc_cdclk() local
2442 min_cdclk = intel_compute_min_cdclk(cdclk_state); in bxt_modeset_calc_cdclk()
2443 if (min_cdclk < 0) in bxt_modeset_calc_cdclk()
2444 return min_cdclk; in bxt_modeset_calc_cdclk()
2450 cdclk = bxt_calc_cdclk(dev_priv, min_cdclk); in bxt_modeset_calc_cdclk()
2476 int min_cdclk; in fixed_modeset_calc_cdclk() local
2483 min_cdclk = intel_compute_min_cdclk(cdclk_state); in fixed_modeset_calc_cdclk()
2484 if (min_cdclk < 0) in fixed_modeset_calc_cdclk()
2485 return min_cdclk; in fixed_modeset_calc_cdclk()