Lines Matching refs:DPLL
541 dpll_reg = DPLL(0); in vlv_wait_port_ready()
545 dpll_reg = DPLL(0); in vlv_wait_port_ready()
4262 tmp = intel_de_read(dev_priv, DPLL(crtc->pipe)); in i9xx_get_pipe_config()
4273 DPLL(crtc->pipe)); in i9xx_get_pipe_config()
11154 intel_de_write(dev_priv, DPLL(pipe), dpll & ~DPLL_VGA_MODE_DIS); in i830_enable_pipe()
11155 intel_de_write(dev_priv, DPLL(pipe), dpll); in i830_enable_pipe()
11158 intel_de_posting_read(dev_priv, DPLL(pipe)); in i830_enable_pipe()
11166 intel_de_write(dev_priv, DPLL(pipe), dpll); in i830_enable_pipe()
11170 intel_de_write(dev_priv, DPLL(pipe), dpll); in i830_enable_pipe()
11171 intel_de_posting_read(dev_priv, DPLL(pipe)); in i830_enable_pipe()
11208 intel_de_write(dev_priv, DPLL(pipe), DPLL_VGA_MODE_DIS); in i830_disable_pipe()
11209 intel_de_posting_read(dev_priv, DPLL(pipe)); in i830_disable_pipe()