Lines Matching refs:u8
54 u8 signature[20];
58 u8 vbt_checksum;
59 u8 reserved0;
72 u8 signature[16];
128 u8 panel_fitting:2;
129 u8 flexaim:1;
130 u8 msg_enable:1;
131 u8 clear_screen:3;
132 u8 color_flip:1;
135 u8 download_ext_vbt:1;
136 u8 enable_ssc:1;
137 u8 ssc_freq:1;
138 u8 enable_lfp_on_override:1;
139 u8 disable_ssc_ddt:1;
140 u8 underscan_vga_timings:1;
141 u8 display_clock_mode:1;
142 u8 vbios_hotplug_support:1;
145 u8 disable_smooth_vision:1;
146 u8 single_dvi:1;
147 u8 rotate_180:1; /* 181 */
148 u8 fdi_rx_polarity_inverted:1;
149 u8 vbios_extended_mode:1; /* 160 */
150 u8 copy_ilfp_dtd_to_sdvo_lvds_dtd:1; /* 160 */
151 u8 panel_best_fit_timing:1; /* 160 */
152 u8 ignore_strap_state:1; /* 160 */
155 u8 legacy_monitor_detect;
158 u8 int_crt_support:1;
159 u8 int_tv_support:1;
160 u8 int_efp_support:1;
161 u8 dp_ssc_enable:1; /* PCH attached eDP supports SSC */
162 u8 dp_ssc_freq:1; /* SSC freq for PCH attached eDP */
163 u8 dp_ssc_dongle_supported:1;
164 u8 rsvd11:2; /* finish byte */
385 u8 device_id[10]; /* ascii string */
387 u8 i2c_speed;
388 u8 dp_onboard_redriver; /* 158 */
389 u8 dp_ondock_redriver; /* 158 */
390 u8 hdmi_level_shifter_value:5; /* 169 */
391 u8 hdmi_max_data_rate:3; /* 204 */
393 u8 edidless_efp:1; /* 161 */
394 u8 compression_enable:1; /* 198 */
395 u8 compression_method_cps:1; /* 198 */
396 u8 ganged_edp:1; /* 202 */
397 u8 reserved0:4;
398 u8 compression_structure_index:4; /* 198 */
399 u8 reserved1:4;
400 u8 slave_port; /* 202 */
401 u8 reserved2;
406 u8 dvo_port; /* See DEVICE_PORT_* and DVO_PORT_* above */
407 u8 i2c_pin;
408 u8 slave_addr;
409 u8 ddc_pin;
411 u8 dvo_cfg; /* See DEVICE_CFG_* above */
415 u8 dvo2_port;
416 u8 i2c2_pin;
417 u8 slave2_addr;
418 u8 ddc2_pin;
421 u8 efp_routed:1; /* 158 */
422 u8 lane_reversal:1; /* 184 */
423 u8 lspcon:1; /* 192 */
424 u8 iboost:1; /* 196 */
425 u8 hpd_invert:1; /* 196 */
426 u8 use_vbt_vswing:1; /* 218 */
427 u8 flag_reserved:2;
428 u8 hdmi_support:1; /* 158 */
429 u8 dp_support:1; /* 158 */
430 u8 tmds_support:1; /* 158 */
431 u8 support_reserved:5;
432 u8 aux_channel;
433 u8 dongle_detect;
437 u8 pipe_cap:2;
438 u8 sdvo_stall:1; /* 158 */
439 u8 hpd_status:2;
440 u8 integrated_encoder:1;
441 u8 capabilities_reserved:2;
442 u8 dvo_wiring; /* See DEVICE_WIRE_* above */
445 u8 dvo2_wiring;
446 u8 mipi_bridge_type; /* 171 */
450 u8 dvo_function;
451 u8 dp_usb_type_c:1; /* 195 */
452 u8 tbt:1; /* 209 */
453 u8 flags2_reserved:2; /* 195 */
454 u8 dp_port_trace_length:4; /* 209 */
455 u8 dp_gpio_index; /* 195 */
457 u8 dp_iboost_level:4; /* 196 */
458 u8 hdmi_iboost_level:4; /* 196 */
459 u8 dp_max_link_rate:3; /* 216/230 GLK+ */
460 u8 dp_max_link_rate_reserved:5; /* 216/230 */
465 u8 crt_ddc_gmbus_pin;
468 u8 dpms_acpi:1;
469 u8 skip_boot_crt_detect:1;
470 u8 dpms_aim:1;
471 u8 rsvd1:5; /* finish byte */
474 u8 boot_display[2];
475 u8 child_dev_size;
488 u8 devices[];
497 u8 full_link:1;
498 u8 require_aux_to_wakeup:1;
499 u8 feature_bits_rsvd:6;
502 u8 idle_frames:4;
503 u8 lines_to_wait:3;
504 u8 wait_times_rsvd:1;
528 u8 boot_dev_algorithm:1;
529 u8 block_display_switch:1;
530 u8 allow_display_switch:1;
531 u8 hotplug_dvo:1;
532 u8 dual_view_zoom:1;
533 u8 int15h_hook:1;
534 u8 sprite_in_clone:1;
535 u8 primary_lfp_id:1;
539 u8 boot_mode_bpp;
540 u8 boot_mode_refresh;
557 u8 static_display:1;
558 u8 reserved2:7;
561 u8 legacy_crt_max_refresh;
563 u8 hdmi_termination;
564 u8 custom_vbt_version;
586 u8 panel_backlight;
587 u8 h40_set_panel_type;
588 u8 panel_type;
589 u8 ssc_clk_freq;
592 u8 sclalarcoeff_tab_row_num;
593 u8 sclalarcoeff_tab_row_size;
594 u8 coefficient[8];
595 u8 panel_misc_bits_1;
596 u8 panel_misc_bits_2;
597 u8 panel_misc_bits_3;
598 u8 panel_misc_bits_4;
607 u8 hactive_lo;
608 u8 hblank_lo;
609 u8 hblank_hi:4;
610 u8 hactive_hi:4;
611 u8 vactive_lo;
612 u8 vblank_lo;
613 u8 vblank_hi:4;
614 u8 vactive_hi:4;
615 u8 hsync_off_lo;
616 u8 hsync_pulse_width_lo;
617 u8 vsync_pulse_width_lo:4;
618 u8 vsync_off_lo:4;
619 u8 vsync_pulse_width_hi:2;
620 u8 vsync_off_hi:2;
621 u8 hsync_pulse_width_hi:2;
622 u8 hsync_off_hi:2;
623 u8 himage_lo;
624 u8 vimage_lo;
625 u8 vimage_hi:4;
626 u8 himage_hi:4;
627 u8 h_border;
628 u8 v_border;
629 u8 rsvd1:3;
630 u8 digital:2;
631 u8 vsync_positive:1;
632 u8 hsync_positive:1;
633 u8 non_interlaced:1;
663 u8 rate:4;
664 u8 lanes:4;
665 u8 preemphasis:4;
666 u8 vswing:4;
675 u8 preemphasis:4;
676 u8 vswing:4;
704 u8 panel_type;
705 u8 panel_type2; /* 212 */
707 u8 pfit_mode:2;
708 u8 pfit_text_mode_enhanced:1;
709 u8 pfit_gfx_mode_enhanced:1;
710 u8 pfit_ratio_auto:1;
711 u8 pixel_dither:1;
712 u8 lvds_edid:1;
713 u8 rsvd2:1;
714 u8 rsvd4;
739 u8 fp_table_size;
741 u8 dvo_table_size;
743 u8 pnp_table_size;
747 u8 lvds_entries; /* followed by one or more lvds_data_ptr structs */
776 u8 mfg_week;
777 u8 mfg_year;
798 u8 type:2;
799 u8 active_low_pwm:1;
800 u8 obsolete1:5;
802 u8 min_brightness; /* Obsolete from 234+ */
803 u8 obsolete2;
804 u8 obsolete3;
808 u8 type:4;
809 u8 controller:4;
823 u8 entry_size;
825 u8 level[16]; /* Obsolete from 234+ */
829 u8 brightness_precision_bits[16]; /* 236+ */
842 u8 dpst_agressiveness : 4;
843 u8 lace_agressiveness : 4;
847 u8 lfp_feature_bits;
849 u8 lace_aggressiveness_profile;
879 u8 version;
880 u8 data[]; /* up to 6 variable length blocks */
896 u8 version_major:4;
897 u8 version_minor:4;
899 u8 rc_buffer_block_size:2;
900 u8 reserved1:6;
907 u8 rc_buffer_size;
910 u8 line_buffer_depth:4;
911 u8 reserved2:4;
914 u8 block_prediction_enable:1;
915 u8 reserved3:7;
917 u8 max_bpp; /* mapping */
920 u8 reserved4:1;
921 u8 support_8bpc:1;
922 u8 support_10bpc:1;
923 u8 support_12bpc:1;
924 u8 reserved5:4;
952 u8 rsvd_flags:6;
953 u8 vsync_positive_polarity:1;
954 u8 hsync_positive_polarity:1;
956 u8 rsvd[3];