Lines Matching refs:i915
48 return rc6_to_gt(rc)->i915; in rc6_to_i915()
125 if (GRAPHICS_VER(gt->i915) >= 12) { in gen11_rc6_enable()
230 struct drm_i915_private *i915 = rc6_to_i915(rc6); in gen6_rc6_enable() local
253 if (HAS_RC6p(i915)) in gen6_rc6_enable()
255 if (HAS_RC6pp(i915)) in gen6_rc6_enable()
263 ret = sandybridge_pcode_read(i915, GEN6_PCODE_READ_RC6VIDS, in gen6_rc6_enable()
265 if (GRAPHICS_VER(i915) == 6 && ret) { in gen6_rc6_enable()
266 drm_dbg(&i915->drm, "Couldn't check for BIOS workaround\n"); in gen6_rc6_enable()
267 } else if (GRAPHICS_VER(i915) == 6 && in gen6_rc6_enable()
269 drm_dbg(&i915->drm, in gen6_rc6_enable()
274 ret = sandybridge_pcode_write(i915, GEN6_PCODE_WRITE_RC6VIDS, rc6vids); in gen6_rc6_enable()
276 drm_err(&i915->drm, in gen6_rc6_enable()
285 struct drm_i915_private *i915 = rc6_to_i915(rc6); in chv_rc6_init() local
292 drm_dbg(&i915->drm, "BIOS didn't set up PCBR, fixing up\n"); in chv_rc6_init()
293 paddr = i915->dsm.end + 1 - pctx_size; in chv_rc6_init()
305 struct drm_i915_private *i915 = rc6_to_i915(rc6); in vlv_rc6_init() local
317 pcbr_offset = (pcbr & ~4095) - i915->dsm.start; in vlv_rc6_init()
318 pctx = i915_gem_object_create_stolen_for_preallocated(i915, in vlv_rc6_init()
327 drm_dbg(&i915->drm, "BIOS didn't set up PCBR, fixing up\n"); in vlv_rc6_init()
337 pctx = i915_gem_object_create_stolen(i915, pctx_size); in vlv_rc6_init()
339 drm_dbg(&i915->drm, in vlv_rc6_init()
345 i915->dsm.start, in vlv_rc6_init()
348 pctx_paddr = i915->dsm.start + pctx->stolen->start; in vlv_rc6_init()
414 struct drm_i915_private *i915 = rc6_to_i915(rc6); in bxt_check_bios_rc6_setup() local
422 drm_dbg(&i915->drm, "BIOS enabled RC states: " in bxt_check_bios_rc6_setup()
429 drm_dbg(&i915->drm, "RC6 Base location not set properly.\n"); in bxt_check_bios_rc6_setup()
439 if (!(rc6_ctx_base >= i915->dsm_reserved.start && in bxt_check_bios_rc6_setup()
440 rc6_ctx_base + PAGE_SIZE < i915->dsm_reserved.end)) { in bxt_check_bios_rc6_setup()
441 drm_dbg(&i915->drm, "RC6 Base address not as expected.\n"); in bxt_check_bios_rc6_setup()
449 drm_dbg(&i915->drm, in bxt_check_bios_rc6_setup()
457 drm_dbg(&i915->drm, "Pushbus not setup properly.\n"); in bxt_check_bios_rc6_setup()
462 drm_dbg(&i915->drm, "GFX pause not setup properly.\n"); in bxt_check_bios_rc6_setup()
467 drm_dbg(&i915->drm, "GPM control not setup properly.\n"); in bxt_check_bios_rc6_setup()
476 struct drm_i915_private *i915 = rc6_to_i915(rc6); in rc6_supported() local
478 if (!HAS_RC6(i915)) in rc6_supported()
481 if (intel_vgpu_active(i915)) in rc6_supported()
487 if (IS_GEN9_LP(i915) && !bxt_check_bios_rc6_setup(rc6)) { in rc6_supported()
488 drm_notice(&i915->drm, in rc6_supported()
512 struct drm_i915_private *i915 = rc6_to_i915(rc6); in pctx_corrupted() local
514 if (!NEEDS_RC6_CTX_CORRUPTION_WA(i915)) in pctx_corrupted()
520 drm_notice(&i915->drm, in pctx_corrupted()
527 struct drm_i915_private *i915 = rc6_to_i915(rc6); in __intel_rc6_disable() local
535 if (GRAPHICS_VER(i915) >= 9) in __intel_rc6_disable()
544 struct drm_i915_private *i915 = rc6_to_i915(rc6); in intel_rc6_init() local
553 if (IS_CHERRYVIEW(i915)) in intel_rc6_init()
555 else if (IS_VALLEYVIEW(i915)) in intel_rc6_init()
581 struct drm_i915_private *i915 = rc6_to_i915(rc6); in intel_rc6_enable() local
591 if (IS_CHERRYVIEW(i915)) in intel_rc6_enable()
593 else if (IS_VALLEYVIEW(i915)) in intel_rc6_enable()
595 else if (GRAPHICS_VER(i915) >= 11) in intel_rc6_enable()
597 else if (GRAPHICS_VER(i915) >= 9) in intel_rc6_enable()
599 else if (IS_BROADWELL(i915)) in intel_rc6_enable()
601 else if (GRAPHICS_VER(i915) >= 6) in intel_rc6_enable()
605 if (NEEDS_RC6_CTX_CORRUPTION_WA(i915)) in intel_rc6_enable()
729 struct drm_i915_private *i915 = rc6_to_i915(rc6); in intel_rc6_residency_ns() local
749 if (drm_WARN_ON_ONCE(&i915->drm, i >= ARRAY_SIZE(rc6->cur_residency))) in intel_rc6_residency_ns()
758 if (IS_VALLEYVIEW(i915) || IS_CHERRYVIEW(i915)) { in intel_rc6_residency_ns()
760 div = i915->czclk_freq; in intel_rc6_residency_ns()
765 if (IS_GEN9_LP(i915)) { in intel_rc6_residency_ns()