Lines Matching refs:cs
32 static u32 *emit_wait(u32 *cs, u32 offset, int op, u32 value) in emit_wait() argument
34 *cs++ = MI_SEMAPHORE_WAIT | in emit_wait()
38 *cs++ = value; in emit_wait()
39 *cs++ = offset; in emit_wait()
40 *cs++ = 0; in emit_wait()
42 return cs; in emit_wait()
45 static u32 *emit_store(u32 *cs, u32 offset, u32 value) in emit_store() argument
47 *cs++ = MI_STORE_DWORD_IMM_GEN4 | MI_USE_GGTT; in emit_store()
48 *cs++ = offset; in emit_store()
49 *cs++ = 0; in emit_store()
50 *cs++ = value; in emit_store()
52 return cs; in emit_store()
55 static u32 *emit_srm(u32 *cs, i915_reg_t reg, u32 offset) in emit_srm() argument
57 *cs++ = MI_STORE_REGISTER_MEM_GEN8 | MI_USE_GGTT; in emit_srm()
58 *cs++ = i915_mmio_reg_offset(reg); in emit_srm()
59 *cs++ = offset; in emit_srm()
60 *cs++ = 0; in emit_srm()
62 return cs; in emit_srm()
78 u32 *cs; in __measure_timestamps() local
84 cs = intel_ring_begin(rq, 28); in __measure_timestamps()
85 if (IS_ERR(cs)) { in __measure_timestamps()
87 return PTR_ERR(cs); in __measure_timestamps()
91 cs = emit_store(cs, offset + 4008, 1); in __measure_timestamps()
92 cs = emit_wait(cs, offset + 4008, MI_SEMAPHORE_SAD_NEQ_SDD, 1); in __measure_timestamps()
94 cs = emit_srm(cs, RING_TIMESTAMP(engine->mmio_base), offset + 4000); in __measure_timestamps()
95 cs = emit_srm(cs, RING_CTX_TIMESTAMP(engine->mmio_base), offset + 4004); in __measure_timestamps()
98 cs = emit_wait(cs, offset + 4008, MI_SEMAPHORE_SAD_EQ_SDD, 1); in __measure_timestamps()
100 cs = emit_srm(cs, RING_TIMESTAMP(engine->mmio_base), offset + 4016); in __measure_timestamps()
101 cs = emit_srm(cs, RING_CTX_TIMESTAMP(engine->mmio_base), offset + 4012); in __measure_timestamps()
103 intel_ring_advance(rq, cs); in __measure_timestamps()