Lines Matching refs:gmbus
131 vgpu->display.i2c_edid.gmbus.phase = GMBUS_IDLE_PHASE; in reset_gmbus_controller()
160 vgpu->display.i2c_edid.gmbus.phase = GMBUS_IDLE_PHASE; in gmbus0_mmio_write()
208 i2c_edid->gmbus.total_byte_count = in gmbus1_mmio_write()
226 i2c_edid->gmbus.cycle_type = gmbus1_bus_cycle(wvalue); in gmbus1_mmio_write()
246 i2c_edid->gmbus.phase = GMBUS_IDLE_PHASE; in gmbus1_mmio_write()
258 i2c_edid->gmbus.phase = GMBUS_DATA_PHASE; in gmbus1_mmio_write()
291 int byte_left = i2c_edid->gmbus.total_byte_count - in gmbus3_mmio_read()
314 switch (i2c_edid->gmbus.cycle_type) { in gmbus3_mmio_read()
317 i2c_edid->gmbus.phase = GMBUS_IDLE_PHASE; in gmbus3_mmio_read()
322 i2c_edid->gmbus.phase = GMBUS_WAIT_PHASE; in gmbus3_mmio_read()
579 memset(&edid->gmbus, 0, sizeof(struct intel_vgpu_i2c_gmbus)); in intel_vgpu_init_i2c_edid()