Lines Matching refs:vgpu_vreg
182 trace_write_ir(vgpu->id, "IMR", reg, imr, vgpu_vreg(vgpu, reg), in intel_vgpu_reg_imr_handler()
183 (vgpu_vreg(vgpu, reg) ^ imr)); in intel_vgpu_reg_imr_handler()
185 vgpu_vreg(vgpu, reg) = imr; in intel_vgpu_reg_imr_handler()
211 u32 virtual_ier = vgpu_vreg(vgpu, reg); in intel_vgpu_reg_master_irq_handler()
223 vgpu_vreg(vgpu, reg) &= ~GEN8_MASTER_IRQ_CONTROL; in intel_vgpu_reg_master_irq_handler()
224 vgpu_vreg(vgpu, reg) |= ier; in intel_vgpu_reg_master_irq_handler()
253 trace_write_ir(vgpu->id, "IER", reg, ier, vgpu_vreg(vgpu, reg), in intel_vgpu_reg_ier_handler()
254 (vgpu_vreg(vgpu, reg) ^ ier)); in intel_vgpu_reg_ier_handler()
256 vgpu_vreg(vgpu, reg) = ier; in intel_vgpu_reg_ier_handler()
291 trace_write_ir(vgpu->id, "IIR", reg, iir, vgpu_vreg(vgpu, reg), in intel_vgpu_reg_iir_handler()
292 (vgpu_vreg(vgpu, reg) ^ iir)); in intel_vgpu_reg_iir_handler()
297 vgpu_vreg(vgpu, reg) &= ~iir; in intel_vgpu_reg_iir_handler()
331 u32 val = vgpu_vreg(vgpu, in update_upstream_irq()
333 & vgpu_vreg(vgpu, in update_upstream_irq()
363 vgpu_vreg(vgpu, isr) &= ~clear_bits; in update_upstream_irq()
364 vgpu_vreg(vgpu, isr) |= set_bits; in update_upstream_irq()
371 vgpu_vreg(vgpu, iir) |= (set_bits & ~vgpu_vreg(vgpu, imr)); in update_upstream_irq()
418 if (!test_bit(bit, (void *)&vgpu_vreg(vgpu, in propagate_event()
421 set_bit(bit, (void *)&vgpu_vreg(vgpu, in propagate_event()
473 if (!(vgpu_vreg(vgpu, i915_mmio_reg_offset(GEN8_MASTER_IRQ)) & in gen8_check_pending_irq()
485 if ((vgpu_vreg(vgpu, regbase_to_iir(reg_base)) in gen8_check_pending_irq()
486 & vgpu_vreg(vgpu, regbase_to_ier(reg_base)))) in gen8_check_pending_irq()
490 if (vgpu_vreg(vgpu, i915_mmio_reg_offset(GEN8_MASTER_IRQ)) in gen8_check_pending_irq()