Lines Matching refs:bytes
61 void *p_data, unsigned int bytes, bool read) in failsafe_emulate_mmio_rw() argument
76 bytes); in failsafe_emulate_mmio_rw()
79 bytes); in failsafe_emulate_mmio_rw()
84 memcpy(p_data, pt, bytes); in failsafe_emulate_mmio_rw()
86 memcpy(pt, p_data, bytes); in failsafe_emulate_mmio_rw()
103 void *p_data, unsigned int bytes) in intel_vgpu_emulate_mmio_read() argument
111 failsafe_emulate_mmio_rw(vgpu, pa, p_data, bytes, true); in intel_vgpu_emulate_mmio_read()
118 if (drm_WARN_ON(&i915->drm, bytes > 8)) in intel_vgpu_emulate_mmio_read()
125 if (drm_WARN_ON(&i915->drm, bytes != 4 && bytes != 8)) in intel_vgpu_emulate_mmio_read()
128 !reg_is_gtt(gvt, offset + bytes - 1))) in intel_vgpu_emulate_mmio_read()
132 p_data, bytes); in intel_vgpu_emulate_mmio_read()
139 ret = intel_gvt_hypervisor_read_gpa(vgpu, pa, p_data, bytes); in intel_vgpu_emulate_mmio_read()
143 if (drm_WARN_ON(&i915->drm, !reg_is_mmio(gvt, offset + bytes - 1))) in intel_vgpu_emulate_mmio_read()
147 if (drm_WARN_ON(&i915->drm, !IS_ALIGNED(offset, bytes))) in intel_vgpu_emulate_mmio_read()
151 ret = intel_vgpu_mmio_reg_rw(vgpu, offset, p_data, bytes, true); in intel_vgpu_emulate_mmio_read()
161 offset, bytes); in intel_vgpu_emulate_mmio_read()
178 void *p_data, unsigned int bytes) in intel_vgpu_emulate_mmio_write() argument
186 failsafe_emulate_mmio_rw(vgpu, pa, p_data, bytes, false); in intel_vgpu_emulate_mmio_write()
194 if (drm_WARN_ON(&i915->drm, bytes > 8)) in intel_vgpu_emulate_mmio_write()
201 if (drm_WARN_ON(&i915->drm, bytes != 4 && bytes != 8)) in intel_vgpu_emulate_mmio_write()
204 !reg_is_gtt(gvt, offset + bytes - 1))) in intel_vgpu_emulate_mmio_write()
208 p_data, bytes); in intel_vgpu_emulate_mmio_write()
215 ret = intel_gvt_hypervisor_write_gpa(vgpu, pa, p_data, bytes); in intel_vgpu_emulate_mmio_write()
219 ret = intel_vgpu_mmio_reg_rw(vgpu, offset, p_data, bytes, false); in intel_vgpu_emulate_mmio_write()
228 bytes); in intel_vgpu_emulate_mmio_write()