Lines Matching refs:INTEL_INFO
1322 #define INTEL_INFO(dev_priv) (&(dev_priv)->__info) macro
1330 #define GRAPHICS_VER(i915) (INTEL_INFO(i915)->graphics_ver)
1331 #define GRAPHICS_VER_FULL(i915) IP_VER(INTEL_INFO(i915)->graphics_ver, \
1332 INTEL_INFO(i915)->graphics_rel)
1336 #define MEDIA_VER(i915) (INTEL_INFO(i915)->media_ver)
1337 #define MEDIA_VER_FULL(i915) IP_VER(INTEL_INFO(i915)->media_ver, \
1338 INTEL_INFO(i915)->media_rel)
1342 #define DISPLAY_VER(i915) (INTEL_INFO(i915)->display.ver)
1348 #define HAS_DSB(dev_priv) (INTEL_INFO(dev_priv)->display.has_dsb)
1423 #define IS_MOBILE(dev_priv) (INTEL_INFO(dev_priv)->is_mobile)
1424 #define IS_DGFX(dev_priv) (INTEL_INFO(dev_priv)->is_dgfx)
1447 INTEL_INFO(dev_priv)->gt == 1)
1480 INTEL_INFO(dev_priv)->gt == 3)
1484 INTEL_INFO(dev_priv)->gt == 3)
1486 INTEL_INFO(dev_priv)->gt == 1)
1499 INTEL_INFO(dev_priv)->gt == 2)
1501 INTEL_INFO(dev_priv)->gt == 3)
1503 INTEL_INFO(dev_priv)->gt == 4)
1505 INTEL_INFO(dev_priv)->gt == 2)
1507 INTEL_INFO(dev_priv)->gt == 3)
1513 INTEL_INFO(dev_priv)->gt == 2)
1515 INTEL_INFO(dev_priv)->gt == 3)
1522 INTEL_INFO(dev_priv)->gt == 2)
1606 #define IS_LP(dev_priv) (INTEL_INFO(dev_priv)->is_lp)
1630 #define HAS_LLC(dev_priv) (INTEL_INFO(dev_priv)->has_llc)
1631 #define HAS_SNOOP(dev_priv) (INTEL_INFO(dev_priv)->has_snoop)
1636 #define HWS_NEEDS_PHYSICAL(dev_priv) (INTEL_INFO(dev_priv)->hws_needs_physical)
1639 (INTEL_INFO(dev_priv)->has_logical_ring_contexts)
1641 (INTEL_INFO(dev_priv)->has_logical_ring_elsq)
1645 #define INTEL_PPGTT(dev_priv) (INTEL_INFO(dev_priv)->ppgtt_type)
1653 ((sizes) & ~INTEL_INFO(dev_priv)->page_sizes) == 0; \
1656 #define HAS_OVERLAY(dev_priv) (INTEL_INFO(dev_priv)->display.has_overlay)
1658 (INTEL_INFO(dev_priv)->display.overlay_needs_physical)
1680 #define SUPPORTS_TV(dev_priv) (INTEL_INFO(dev_priv)->display.supports_tv)
1681 #define I915_HAS_HOTPLUG(dev_priv) (INTEL_INFO(dev_priv)->display.has_hotplug)
1684 #define HAS_FBC(dev_priv) (INTEL_INFO(dev_priv)->display.has_fbc)
1689 #define HAS_DP_MST(dev_priv) (INTEL_INFO(dev_priv)->display.has_dp_mst)
1692 #define HAS_CDCLK_CRAWL(dev_priv) (INTEL_INFO(dev_priv)->display.has_cdclk_crawl)
1693 #define HAS_DDI(dev_priv) (INTEL_INFO(dev_priv)->display.has_ddi)
1694 #define HAS_FPGA_DBG_UNCLAIMED(dev_priv) (INTEL_INFO(dev_priv)->display.has_fpga_dbg)
1695 #define HAS_PSR(dev_priv) (INTEL_INFO(dev_priv)->display.has_psr)
1697 (INTEL_INFO(dev_priv)->display.has_psr_hw_tracking)
1699 #define HAS_TRANSCODER(dev_priv, trans) ((INTEL_INFO(dev_priv)->cpu_transcoder_mask & BIT(trans)) …
1701 #define HAS_RC6(dev_priv) (INTEL_INFO(dev_priv)->has_rc6)
1702 #define HAS_RC6p(dev_priv) (INTEL_INFO(dev_priv)->has_rc6p)
1705 #define HAS_RPS(dev_priv) (INTEL_INFO(dev_priv)->has_rps)
1707 #define HAS_DMC(dev_priv) (INTEL_INFO(dev_priv)->display.has_dmc)
1711 #define HAS_RUNTIME_PM(dev_priv) (INTEL_INFO(dev_priv)->has_runtime_pm)
1712 #define HAS_64BIT_RELOC(dev_priv) (INTEL_INFO(dev_priv)->has_64bit_reloc)
1715 (INTEL_INFO(dev_priv)->has_mslices)
1717 #define HAS_IPC(dev_priv) (INTEL_INFO(dev_priv)->display.has_ipc)
1719 #define HAS_REGION(i915, i) (INTEL_INFO(i915)->memory_regions & (i))
1722 #define HAS_GT_UC(dev_priv) (INTEL_INFO(dev_priv)->has_gt_uc)
1724 #define HAS_POOLED_EU(dev_priv) (INTEL_INFO(dev_priv)->has_pooled_eu)
1726 #define HAS_GLOBAL_MOCS_REGISTERS(dev_priv) (INTEL_INFO(dev_priv)->has_global_mocs)
1729 INTEL_INFO(dev_priv)->has_pxp) && \
1732 #define HAS_GMCH(dev_priv) (INTEL_INFO(dev_priv)->display.has_gmch)
1737 #define HAS_L3_DPF(dev_priv) (INTEL_INFO(dev_priv)->has_l3_dpf)
1744 #define INTEL_NUM_PIPES(dev_priv) (hweight8(INTEL_INFO(dev_priv)->pipe_mask))
1746 #define HAS_DISPLAY(dev_priv) (INTEL_INFO(dev_priv)->pipe_mask != 0)
1969 return (struct intel_device_info *)INTEL_INFO(dev_priv); in mkwrite_device_info()