Lines Matching refs:raw_reg_write
2174 raw_reg_write(regs, DEIER, de_ier & ~DE_MASTER_IRQ_CONTROL); in ilk_irq_handler()
2183 raw_reg_write(regs, SDEIER, 0); in ilk_irq_handler()
2190 raw_reg_write(regs, GTIIR, gt_iir); in ilk_irq_handler()
2200 raw_reg_write(regs, DEIIR, de_iir); in ilk_irq_handler()
2211 raw_reg_write(regs, GEN6_PMIIR, pm_iir); in ilk_irq_handler()
2217 raw_reg_write(regs, DEIER, de_ier); in ilk_irq_handler()
2219 raw_reg_write(regs, SDEIER, sde_ier); in ilk_irq_handler()
2606 raw_reg_write(regs, GEN8_MASTER_IRQ, 0); in gen8_master_intr_disable()
2619 raw_reg_write(regs, GEN8_MASTER_IRQ, GEN8_MASTER_IRQ_CONTROL); in gen8_master_intr_enable()
2665 raw_reg_write(regs, GEN11_GU_MISC_IIR, iir); in gen11_gu_misc_irq_ack()
2679 raw_reg_write(regs, GEN11_GFX_MSTR_IRQ, 0); in gen11_master_intr_disable()
2692 raw_reg_write(regs, GEN11_GFX_MSTR_IRQ, GEN11_MASTER_IRQ); in gen11_master_intr_enable()
2706 raw_reg_write(regs, GEN11_DISPLAY_INT_CTL, 0x0); in gen11_display_irq_handler()
2708 raw_reg_write(regs, GEN11_DISPLAY_INT_CTL, in gen11_display_irq_handler()
2754 raw_reg_write(regs, DG1_MSTR_TILE_INTR, 0); in dg1_master_intr_disable()
2761 raw_reg_write(regs, DG1_MSTR_TILE_INTR, val); in dg1_master_intr_disable()
2768 raw_reg_write(regs, DG1_MSTR_TILE_INTR, DG1_MSTR_IRQ); in dg1_master_intr_enable()
2791 raw_reg_write(regs, GEN11_GFX_MSTR_IRQ, master_ctl); in dg1_irq_handler()