Lines Matching refs:status_mask

505 	u32 status_mask = dev_priv->pipestat_irq_mask[pipe];  in i915_pipestat_enable_mask()  local
506 u32 enable_mask = status_mask << 16; in i915_pipestat_enable_mask()
518 status_mask & PIPE_A_PSR_STATUS_VLV)) in i915_pipestat_enable_mask()
525 status_mask & PIPE_B_PSR_STATUS_VLV)) in i915_pipestat_enable_mask()
531 if (status_mask & SPRITE0_FLIP_DONE_INT_STATUS_VLV) in i915_pipestat_enable_mask()
533 if (status_mask & SPRITE1_FLIP_DONE_INT_STATUS_VLV) in i915_pipestat_enable_mask()
539 status_mask & ~PIPESTAT_INT_STATUS_MASK, in i915_pipestat_enable_mask()
541 pipe_name(pipe), enable_mask, status_mask); in i915_pipestat_enable_mask()
547 enum pipe pipe, u32 status_mask) in i915_enable_pipestat() argument
552 drm_WARN_ONCE(&dev_priv->drm, status_mask & ~PIPESTAT_INT_STATUS_MASK, in i915_enable_pipestat()
554 pipe_name(pipe), status_mask); in i915_enable_pipestat()
559 if ((dev_priv->pipestat_irq_mask[pipe] & status_mask) == status_mask) in i915_enable_pipestat()
562 dev_priv->pipestat_irq_mask[pipe] |= status_mask; in i915_enable_pipestat()
565 intel_uncore_write(&dev_priv->uncore, reg, enable_mask | status_mask); in i915_enable_pipestat()
570 enum pipe pipe, u32 status_mask) in i915_disable_pipestat() argument
575 drm_WARN_ONCE(&dev_priv->drm, status_mask & ~PIPESTAT_INT_STATUS_MASK, in i915_disable_pipestat()
577 pipe_name(pipe), status_mask); in i915_disable_pipestat()
582 if ((dev_priv->pipestat_irq_mask[pipe] & status_mask) == 0) in i915_disable_pipestat()
585 dev_priv->pipestat_irq_mask[pipe] &= ~status_mask; in i915_disable_pipestat()
588 intel_uncore_write(&dev_priv->uncore, reg, enable_mask | status_mask); in i915_disable_pipestat()
1443 u32 status_mask, enable_mask, iir_bit = 0; in i9xx_pipestat_irq_ack() local
1454 status_mask = PIPE_FIFO_UNDERRUN_STATUS; in i9xx_pipestat_irq_ack()
1469 status_mask |= dev_priv->pipestat_irq_mask[pipe]; in i9xx_pipestat_irq_ack()
1471 if (!status_mask) in i9xx_pipestat_irq_ack()
1475 pipe_stats[pipe] = intel_uncore_read(&dev_priv->uncore, reg) & status_mask; in i9xx_pipestat_irq_ack()