Lines Matching refs:mipi_mmio_base
11819 #define _MIPIA_DEVICE_READY (dev_priv->mipi_mmio_base + 0xb000)
11820 #define _MIPIC_DEVICE_READY (dev_priv->mipi_mmio_base + 0xb800)
11829 #define _MIPIA_INTR_STAT (dev_priv->mipi_mmio_base + 0xb004)
11830 #define _MIPIC_INTR_STAT (dev_priv->mipi_mmio_base + 0xb804)
11832 #define _MIPIA_INTR_EN (dev_priv->mipi_mmio_base + 0xb008)
11833 #define _MIPIC_INTR_EN (dev_priv->mipi_mmio_base + 0xb808)
11868 #define _MIPIA_DSI_FUNC_PRG (dev_priv->mipi_mmio_base + 0xb00c)
11869 #define _MIPIC_DSI_FUNC_PRG (dev_priv->mipi_mmio_base + 0xb80c)
11891 #define _MIPIA_HS_TX_TIMEOUT (dev_priv->mipi_mmio_base + 0xb010)
11892 #define _MIPIC_HS_TX_TIMEOUT (dev_priv->mipi_mmio_base + 0xb810)
11896 #define _MIPIA_LP_RX_TIMEOUT (dev_priv->mipi_mmio_base + 0xb014)
11897 #define _MIPIC_LP_RX_TIMEOUT (dev_priv->mipi_mmio_base + 0xb814)
11901 #define _MIPIA_TURN_AROUND_TIMEOUT (dev_priv->mipi_mmio_base + 0xb018)
11902 #define _MIPIC_TURN_AROUND_TIMEOUT (dev_priv->mipi_mmio_base + 0xb818)
11906 #define _MIPIA_DEVICE_RESET_TIMER (dev_priv->mipi_mmio_base + 0xb01c)
11907 #define _MIPIC_DEVICE_RESET_TIMER (dev_priv->mipi_mmio_base + 0xb81c)
11911 #define _MIPIA_DPI_RESOLUTION (dev_priv->mipi_mmio_base + 0xb020)
11912 #define _MIPIC_DPI_RESOLUTION (dev_priv->mipi_mmio_base + 0xb820)
11919 #define _MIPIA_DBI_FIFO_THROTTLE (dev_priv->mipi_mmio_base + 0xb024)
11920 #define _MIPIC_DBI_FIFO_THROTTLE (dev_priv->mipi_mmio_base + 0xb824)
11927 #define _MIPIA_HSYNC_PADDING_COUNT (dev_priv->mipi_mmio_base + 0xb028)
11928 #define _MIPIC_HSYNC_PADDING_COUNT (dev_priv->mipi_mmio_base + 0xb828)
11931 #define _MIPIA_HBP_COUNT (dev_priv->mipi_mmio_base + 0xb02c)
11932 #define _MIPIC_HBP_COUNT (dev_priv->mipi_mmio_base + 0xb82c)
11935 #define _MIPIA_HFP_COUNT (dev_priv->mipi_mmio_base + 0xb030)
11936 #define _MIPIC_HFP_COUNT (dev_priv->mipi_mmio_base + 0xb830)
11939 #define _MIPIA_HACTIVE_AREA_COUNT (dev_priv->mipi_mmio_base + 0xb034)
11940 #define _MIPIC_HACTIVE_AREA_COUNT (dev_priv->mipi_mmio_base + 0xb834)
11943 #define _MIPIA_VSYNC_PADDING_COUNT (dev_priv->mipi_mmio_base + 0xb038)
11944 #define _MIPIC_VSYNC_PADDING_COUNT (dev_priv->mipi_mmio_base + 0xb838)
11947 #define _MIPIA_VBP_COUNT (dev_priv->mipi_mmio_base + 0xb03c)
11948 #define _MIPIC_VBP_COUNT (dev_priv->mipi_mmio_base + 0xb83c)
11951 #define _MIPIA_VFP_COUNT (dev_priv->mipi_mmio_base + 0xb040)
11952 #define _MIPIC_VFP_COUNT (dev_priv->mipi_mmio_base + 0xb840)
11955 #define _MIPIA_HIGH_LOW_SWITCH_COUNT (dev_priv->mipi_mmio_base + 0xb044)
11956 #define _MIPIC_HIGH_LOW_SWITCH_COUNT (dev_priv->mipi_mmio_base + 0xb844)
11961 #define _MIPIA_DPI_CONTROL (dev_priv->mipi_mmio_base + 0xb048)
11962 #define _MIPIC_DPI_CONTROL (dev_priv->mipi_mmio_base + 0xb848)
11972 #define _MIPIA_DPI_DATA (dev_priv->mipi_mmio_base + 0xb04c)
11973 #define _MIPIC_DPI_DATA (dev_priv->mipi_mmio_base + 0xb84c)
11978 #define _MIPIA_INIT_COUNT (dev_priv->mipi_mmio_base + 0xb050)
11979 #define _MIPIC_INIT_COUNT (dev_priv->mipi_mmio_base + 0xb850)
11984 #define _MIPIA_MAX_RETURN_PKT_SIZE (dev_priv->mipi_mmio_base + 0xb054)
11985 #define _MIPIC_MAX_RETURN_PKT_SIZE (dev_priv->mipi_mmio_base + 0xb854)
11991 #define _MIPIA_VIDEO_MODE_FORMAT (dev_priv->mipi_mmio_base + 0xb058)
11992 #define _MIPIC_VIDEO_MODE_FORMAT (dev_priv->mipi_mmio_base + 0xb858)
12001 #define _MIPIA_EOT_DISABLE (dev_priv->mipi_mmio_base + 0xb05c)
12002 #define _MIPIC_EOT_DISABLE (dev_priv->mipi_mmio_base + 0xb85c)
12015 #define _MIPIA_LP_BYTECLK (dev_priv->mipi_mmio_base + 0xb060)
12016 #define _MIPIC_LP_BYTECLK (dev_priv->mipi_mmio_base + 0xb860)
12021 #define _MIPIA_TLPX_TIME_COUNT (dev_priv->mipi_mmio_base + 0xb0a4)
12022 #define _MIPIC_TLPX_TIME_COUNT (dev_priv->mipi_mmio_base + 0xb8a4)
12025 #define _MIPIA_CLK_LANE_TIMING (dev_priv->mipi_mmio_base + 0xb098)
12026 #define _MIPIC_CLK_LANE_TIMING (dev_priv->mipi_mmio_base + 0xb898)
12030 #define _MIPIA_LP_GEN_DATA (dev_priv->mipi_mmio_base + 0xb064)
12031 #define _MIPIC_LP_GEN_DATA (dev_priv->mipi_mmio_base + 0xb864)
12035 #define _MIPIA_HS_GEN_DATA (dev_priv->mipi_mmio_base + 0xb068)
12036 #define _MIPIC_HS_GEN_DATA (dev_priv->mipi_mmio_base + 0xb868)
12039 #define _MIPIA_LP_GEN_CTRL (dev_priv->mipi_mmio_base + 0xb06c)
12040 #define _MIPIC_LP_GEN_CTRL (dev_priv->mipi_mmio_base + 0xb86c)
12042 #define _MIPIA_HS_GEN_CTRL (dev_priv->mipi_mmio_base + 0xb070)
12043 #define _MIPIC_HS_GEN_CTRL (dev_priv->mipi_mmio_base + 0xb870)
12055 #define _MIPIA_GEN_FIFO_STAT (dev_priv->mipi_mmio_base + 0xb074)
12056 #define _MIPIC_GEN_FIFO_STAT (dev_priv->mipi_mmio_base + 0xb874)
12073 #define _MIPIA_HS_LS_DBI_ENABLE (dev_priv->mipi_mmio_base + 0xb078)
12074 #define _MIPIC_HS_LS_DBI_ENABLE (dev_priv->mipi_mmio_base + 0xb878)
12080 #define _MIPIA_DPHY_PARAM (dev_priv->mipi_mmio_base + 0xb080)
12081 #define _MIPIC_DPHY_PARAM (dev_priv->mipi_mmio_base + 0xb880)
12330 #define _MIPIA_DBI_BW_CTRL (dev_priv->mipi_mmio_base + 0xb084)
12331 #define _MIPIC_DBI_BW_CTRL (dev_priv->mipi_mmio_base + 0xb884)
12334 #define _MIPIA_CLK_LANE_SWITCH_TIME_CNT (dev_priv->mipi_mmio_base + 0xb088)
12335 #define _MIPIC_CLK_LANE_SWITCH_TIME_CNT (dev_priv->mipi_mmio_base + 0xb888)
12342 #define _MIPIA_STOP_STATE_STALL (dev_priv->mipi_mmio_base + 0xb08c)
12343 #define _MIPIC_STOP_STATE_STALL (dev_priv->mipi_mmio_base + 0xb88c)
12348 #define _MIPIA_INTR_STAT_REG_1 (dev_priv->mipi_mmio_base + 0xb090)
12349 #define _MIPIC_INTR_STAT_REG_1 (dev_priv->mipi_mmio_base + 0xb890)
12351 #define _MIPIA_INTR_EN_REG_1 (dev_priv->mipi_mmio_base + 0xb094)
12352 #define _MIPIC_INTR_EN_REG_1 (dev_priv->mipi_mmio_base + 0xb894)
12357 #define MIPIA_DBI_TYPEC_CTRL (dev_priv->mipi_mmio_base + 0xb100)
12371 #define _MIPIA_CTRL (dev_priv->mipi_mmio_base + 0xb104)
12372 #define _MIPIC_CTRL (dev_priv->mipi_mmio_base + 0xb904)
12404 #define _MIPIA_DATA_ADDRESS (dev_priv->mipi_mmio_base + 0xb108)
12405 #define _MIPIC_DATA_ADDRESS (dev_priv->mipi_mmio_base + 0xb908)
12411 #define _MIPIA_DATA_LENGTH (dev_priv->mipi_mmio_base + 0xb10c)
12412 #define _MIPIC_DATA_LENGTH (dev_priv->mipi_mmio_base + 0xb90c)
12417 #define _MIPIA_COMMAND_ADDRESS (dev_priv->mipi_mmio_base + 0xb110)
12418 #define _MIPIC_COMMAND_ADDRESS (dev_priv->mipi_mmio_base + 0xb910)
12426 #define _MIPIA_COMMAND_LENGTH (dev_priv->mipi_mmio_base + 0xb114)
12427 #define _MIPIC_COMMAND_LENGTH (dev_priv->mipi_mmio_base + 0xb914)
12432 #define _MIPIA_READ_DATA_RETURN0 (dev_priv->mipi_mmio_base + 0xb118)
12433 #define _MIPIC_READ_DATA_RETURN0 (dev_priv->mipi_mmio_base + 0xb918)
12436 #define _MIPIA_READ_DATA_VALID (dev_priv->mipi_mmio_base + 0xb138)
12437 #define _MIPIC_READ_DATA_VALID (dev_priv->mipi_mmio_base + 0xb938)