Lines Matching refs:tc_port
2041 #define MG_PHY_PORT_LN(ln, tc_port, ln0p1, ln0p2, ln1p1) \ argument
2042 _MMIO(_PORT(tc_port, ln0p1, ln0p2) + (ln) * ((ln1p1) - (ln0p1)))
2052 #define MG_TX1_LINK_PARAMS(ln, tc_port) \ argument
2053 MG_PHY_PORT_LN(ln, tc_port, MG_TX_LINK_PARAMS_TX1LN0_PORT1, \
2065 #define MG_TX2_LINK_PARAMS(ln, tc_port) \ argument
2066 MG_PHY_PORT_LN(ln, tc_port, MG_TX_LINK_PARAMS_TX2LN0_PORT1, \
2079 #define MG_TX1_PISO_READLOAD(ln, tc_port) \ argument
2080 MG_PHY_PORT_LN(ln, tc_port, MG_TX_PISO_READLOAD_TX1LN0_PORT1, \
2092 #define MG_TX2_PISO_READLOAD(ln, tc_port) \ argument
2093 MG_PHY_PORT_LN(ln, tc_port, MG_TX_PISO_READLOAD_TX2LN0_PORT1, \
2106 #define MG_TX1_SWINGCTRL(ln, tc_port) \ argument
2107 MG_PHY_PORT_LN(ln, tc_port, MG_TX_SWINGCTRL_TX1LN0_PORT1, \
2119 #define MG_TX2_SWINGCTRL(ln, tc_port) \ argument
2120 MG_PHY_PORT_LN(ln, tc_port, MG_TX_SWINGCTRL_TX2LN0_PORT1, \
2134 #define MG_TX1_DRVCTRL(ln, tc_port) \ argument
2135 MG_PHY_PORT_LN(ln, tc_port, MG_TX_DRVCTRL_TX1LN0_TXPORT1, \
2147 #define MG_TX2_DRVCTRL(ln, tc_port) \ argument
2148 MG_PHY_PORT_LN(ln, tc_port, MG_TX_DRVCTRL_TX2LN0_PORT1, \
2167 #define MG_CLKHUB(ln, tc_port) \ argument
2168 MG_PHY_PORT_LN(ln, tc_port, MG_CLKHUB_LN0_PORT1, \
2181 #define MG_TX1_DCC(ln, tc_port) \ argument
2182 MG_PHY_PORT_LN(ln, tc_port, MG_TX_DCC_TX1LN0_PORT1, \
2193 #define MG_TX2_DCC(ln, tc_port) \ argument
2194 MG_PHY_PORT_LN(ln, tc_port, MG_TX_DCC_TX2LN0_PORT1, \
2209 #define MG_DP_MODE(ln, tc_port) \ argument
2210 MG_PHY_PORT_LN(ln, tc_port, MG_DP_MODE_LN0_ACU_PORT1, \
10595 #define ICL_DPCLKA_CFGCR0_TC_CLK_OFF(tc_port) (1 << ((tc_port) < TC_PORT_4 ? \ argument
10596 (tc_port) + 12 : \
10597 (tc_port) - TC_PORT_4 + 21))
10670 #define MG_PLL_ENABLE(tc_port) _MMIO_PORT((tc_port), _MG_PLL1_ENABLE, \ argument
10681 #define ADLP_PORTTC_PLL_ENABLE(tc_port) _MMIO_PORT((tc_port), \ argument
10691 #define MG_REFCLKIN_CTL(tc_port) _MMIO_PORT((tc_port), \ argument
10703 #define MG_CLKTOP2_CORECLKCTL1(tc_port) _MMIO_PORT((tc_port), \ argument
10723 #define MG_CLKTOP2_HSCLKCTL(tc_port) _MMIO_PORT((tc_port), \ argument
10737 #define MG_PLL_DIV0(tc_port) _MMIO_PORT((tc_port), _MG_PLL_DIV0_PORT1, \ argument
10752 #define MG_PLL_DIV1(tc_port) _MMIO_PORT((tc_port), _MG_PLL_DIV1_PORT1, \ argument
10765 #define MG_PLL_LF(tc_port) _MMIO_PORT((tc_port), _MG_PLL_LF_PORT1, \ argument
10778 #define MG_PLL_FRAC_LOCK(tc_port) _MMIO_PORT((tc_port), \ argument
10792 #define MG_PLL_SSC(tc_port) _MMIO_PORT((tc_port), _MG_PLL_SSC_PORT1, \ argument
10812 #define MG_PLL_BIAS(tc_port) _MMIO_PORT((tc_port), _MG_PLL_BIAS_PORT1, \ argument
10824 #define MG_PLL_TDC_COLDST_BIAS(tc_port) _MMIO_PORT((tc_port), \ argument
10940 #define DKL_PLL_DIV0(tc_port) _MMIO(_PORT(tc_port, _DKL_PHY1_BASE, \ argument
10949 #define DKL_PLL_DIV1(tc_port) _MMIO(_PORT(tc_port, _DKL_PHY1_BASE, \ argument
10961 #define DKL_PLL_SSC(tc_port) _MMIO(_PORT(tc_port, _DKL_PHY1_BASE, \ argument
10970 #define DKL_PLL_BIAS(tc_port) _MMIO(_PORT(tc_port, _DKL_PHY1_BASE, \ argument
10979 #define DKL_PLL_TDC_COLDST_BIAS(tc_port) _MMIO(_PORT(tc_port, \ argument
10986 #define DKL_REFCLKIN_CTL(tc_port) _MMIO(_PORT(tc_port, \ argument
10993 #define DKL_CLKTOP2_HSCLKCTL(tc_port) _MMIO(_PORT(tc_port, \ argument
11000 #define DKL_CLKTOP2_CORECLKCTL1(tc_port) _MMIO(_PORT(tc_port, \ argument
11012 #define DKL_TX_DPCNTL0(tc_port) _MMIO(_PORT(tc_port, \ argument
11019 #define DKL_TX_DPCNTL1(tc_port) _MMIO(_PORT(tc_port, \ argument
11026 #define DKL_TX_DPCNTL2(tc_port) _MMIO(_PORT(tc_port, \ argument
11033 #define DKL_TX_FW_CALIB(tc_port) _MMIO(_PORT(tc_port, \ argument
11039 #define DKL_TX_PMD_LANE_SUS(tc_port) _MMIO(_PORT(tc_port, \ argument
11045 #define DKL_TX_DW17(tc_port) _MMIO(_PORT(tc_port, \ argument
11051 #define DKL_TX_DW18(tc_port) _MMIO(_PORT(tc_port, \ argument
11057 #define DKL_DP_MODE(tc_port) _MMIO(_PORT(tc_port, \ argument
11064 #define DKL_CMN_UC_DW_27(tc_port) _MMIO(_PORT(tc_port, \ argument
11077 #define HIP_INDEX_REG(tc_port) _MMIO((tc_port) < 4 ? _HIP_INDEX_REG0 \ argument
11079 #define _HIP_INDEX_SHIFT(tc_port) (8 * ((tc_port) % 4)) argument
11080 #define HIP_INDEX_VAL(tc_port, val) ((val) << _HIP_INDEX_SHIFT(tc_port)) argument