Lines Matching refs:PLANE_CURSOR

537 	fifo_state->plane[PLANE_CURSOR] = 63;  in vlv_get_fifo_size()
857 if (plane->id == PLANE_CURSOR) in intel_wm_plane_visible()
995 FW_WM(wm->pipe[PIPE_B].plane[PLANE_CURSOR], CURSORB) | in g4x_write_wm_values()
1003 FW_WM(wm->pipe[PIPE_A].plane[PLANE_CURSOR], CURSORA) | in g4x_write_wm_values()
1026 (wm->ddl[pipe].plane[PLANE_CURSOR] << DDL_CURSOR_SHIFT) | in vlv_write_wm_values()
1045 FW_WM(wm->pipe[PIPE_B].plane[PLANE_CURSOR], CURSORB) | in vlv_write_wm_values()
1050 FW_WM(wm->pipe[PIPE_A].plane[PLANE_CURSOR], CURSORA) | in vlv_write_wm_values()
1064 FW_WM(wm->pipe[PIPE_C].plane[PLANE_CURSOR], CURSORC)); in vlv_write_wm_values()
1122 case PLANE_CURSOR: in g4x_plane_fifo_size()
1182 if (plane->id == PLANE_CURSOR) { in g4x_compute_wm()
1335 g4x_raw_plane_wm_is_valid(crtc_state, PLANE_CURSOR, level); in g4x_raw_crtc_wm_is_valid()
1387 u8 active_planes = crtc_state->active_planes & ~BIT(PLANE_CURSOR); in g4x_compute_pipe_wm()
1424 wm_state->sr.cursor = raw->plane[PLANE_CURSOR]; in g4x_compute_pipe_wm()
1435 wm_state->hpll.cursor = raw->plane[PLANE_CURSOR]; in g4x_compute_pipe_wm()
1516 g4x_plane_fifo_size(PLANE_CURSOR, G4X_WM_LEVEL_SR)) && in g4x_compute_intermediate_wm()
1522 g4x_plane_fifo_size(PLANE_CURSOR, G4X_WM_LEVEL_HPLL)) && in g4x_compute_intermediate_wm()
1689 if (plane->id == PLANE_CURSOR) { in vlv_compute_wm_level()
1718 u8 active_planes = crtc_state->active_planes & ~BIT(PLANE_CURSOR); in vlv_compute_fifo()
1764 fifo_state->plane[PLANE_CURSOR] = 63; in vlv_compute_fifo()
1858 int max_wm = plane_id == PLANE_CURSOR ? 63 : 511; in vlv_raw_plane_wm_compute()
1898 vlv_raw_plane_wm_is_valid(crtc_state, PLANE_CURSOR, level); in vlv_raw_crtc_wm_is_valid()
1910 u8 active_planes = crtc_state->active_planes & ~BIT(PLANE_CURSOR); in vlv_compute_pipe_wm()
1944 if (dirty & ~BIT(PLANE_CURSOR)) { in vlv_compute_pipe_wm()
1989 vlv_invert_wm_value(raw->plane[PLANE_CURSOR], in vlv_compute_pipe_wm()
2027 drm_WARN_ON(&dev_priv->drm, fifo_state->plane[PLANE_CURSOR] != 63); in vlv_atomic_update_fifo()
2197 wm->ddl[pipe].plane[PLANE_CURSOR] = DDL_PRECISION_HIGH | 2; in vlv_merge_wm()
4303 if (plane_id == PLANE_CURSOR) { in skl_ddb_get_hw_plane_state()
4924 if (plane->id == PLANE_CURSOR) in skl_plane_relative_data_rate()
5135 total[PLANE_CURSOR] = skl_cursor_allocation(crtc_state, num_active); in skl_allocate_plane_ddb()
5136 alloc_size -= total[PLANE_CURSOR]; in skl_allocate_plane_ddb()
5137 crtc_state->wm.skl.plane_ddb_y[PLANE_CURSOR].start = in skl_allocate_plane_ddb()
5138 alloc->end - total[PLANE_CURSOR]; in skl_allocate_plane_ddb()
5139 crtc_state->wm.skl.plane_ddb_y[PLANE_CURSOR].end = alloc->end; in skl_allocate_plane_ddb()
5154 if (plane_id == PLANE_CURSOR) { in skl_allocate_plane_ddb()
5155 if (wm->wm[level].min_ddb_alloc > total[PLANE_CURSOR]) { in skl_allocate_plane_ddb()
5193 if (plane_id == PLANE_CURSOR) in skl_allocate_plane_ddb()
5232 if (plane_id == PLANE_CURSOR) in skl_allocate_plane_ddb()
6556 if (plane_id != PLANE_CURSOR) in skl_pipe_wm_get_hw_state()
6564 if (plane_id != PLANE_CURSOR) in skl_pipe_wm_get_hw_state()
6572 if (plane_id != PLANE_CURSOR) in skl_pipe_wm_get_hw_state()
6581 if (plane_id != PLANE_CURSOR) in skl_pipe_wm_get_hw_state()
6709 wm->pipe[PIPE_B].plane[PLANE_CURSOR] = _FW_WM(tmp, CURSORB); in g4x_read_wm_values()
6718 wm->pipe[PIPE_A].plane[PLANE_CURSOR] = _FW_WM(tmp, CURSORA); in g4x_read_wm_values()
6739 wm->ddl[pipe].plane[PLANE_CURSOR] = in vlv_read_wm_values()
6749 wm->pipe[PIPE_B].plane[PLANE_CURSOR] = _FW_WM(tmp, CURSORB); in vlv_read_wm_values()
6755 wm->pipe[PIPE_A].plane[PLANE_CURSOR] = _FW_WM(tmp, CURSORA); in vlv_read_wm_values()
6772 wm->pipe[PIPE_C].plane[PLANE_CURSOR] = _FW_WM(tmp, CURSORC); in vlv_read_wm_values()
6852 raw->plane[PLANE_CURSOR] = active->sr.cursor; in g4x_wm_get_hw_state()
6862 raw->plane[PLANE_CURSOR] = active->hpll.cursor; in g4x_wm_get_hw_state()
6880 wm->pipe[pipe].plane[PLANE_CURSOR], in g4x_wm_get_hw_state()
7040 wm->pipe[pipe].plane[PLANE_CURSOR], in vlv_wm_get_hw_state()