Lines Matching refs:pipe_mode
917 const struct drm_display_mode *pipe_mode = in pnv_update_wm() local
918 &crtc->config->hw.pipe_mode; in pnv_update_wm()
922 int clock = pipe_mode->crtc_clock; in pnv_update_wm()
1153 const struct drm_display_mode *pipe_mode = in g4x_compute_wm() local
1154 &crtc_state->hw.pipe_mode; in g4x_compute_wm()
1177 clock = pipe_mode->crtc_clock; in g4x_compute_wm()
1178 htotal = pipe_mode->crtc_htotal; in g4x_compute_wm()
1674 const struct drm_display_mode *pipe_mode = in vlv_compute_wm_level() local
1675 &crtc_state->hw.pipe_mode; in vlv_compute_wm_level()
1685 clock = pipe_mode->crtc_clock; in vlv_compute_wm_level()
1686 htotal = pipe_mode->crtc_htotal; in vlv_compute_wm_level()
2275 const struct drm_display_mode *pipe_mode = in i965_update_wm() local
2276 &crtc->config->hw.pipe_mode; in i965_update_wm()
2279 int clock = pipe_mode->crtc_clock; in i965_update_wm()
2280 int htotal = pipe_mode->crtc_htotal; in i965_update_wm()
2361 const struct drm_display_mode *pipe_mode = in i9xx_update_wm() local
2362 &crtc->config->hw.pipe_mode; in i9xx_update_wm()
2372 planea_wm = intel_calculate_wm(pipe_mode->crtc_clock, in i9xx_update_wm()
2391 const struct drm_display_mode *pipe_mode = in i9xx_update_wm() local
2392 &crtc->config->hw.pipe_mode; in i9xx_update_wm()
2402 planeb_wm = intel_calculate_wm(pipe_mode->crtc_clock, in i9xx_update_wm()
2440 const struct drm_display_mode *pipe_mode = in i9xx_update_wm() local
2441 &enabled->config->hw.pipe_mode; in i9xx_update_wm()
2444 int clock = pipe_mode->crtc_clock; in i9xx_update_wm()
2445 int htotal = pipe_mode->crtc_htotal; in i9xx_update_wm()
2492 const struct drm_display_mode *pipe_mode; in i845_update_wm() local
2500 pipe_mode = &crtc->config->hw.pipe_mode; in i845_update_wm()
2501 planea_wm = intel_calculate_wm(pipe_mode->crtc_clock, in i845_update_wm()
2591 crtc_state->hw.pipe_mode.crtc_htotal, in ilk_compute_pri_wm()
2619 crtc_state->hw.pipe_mode.crtc_htotal, in ilk_compute_spr_wm()
2644 crtc_state->hw.pipe_mode.crtc_htotal, in ilk_compute_cur_wm()
3906 if (crtc_state->hw.pipe_mode.flags & DRM_MODE_FLAG_INTERLACE) in skl_crtc_can_enable_sagv()
4117 const struct drm_display_mode *pipe_mode = &crtc_state->hw.pipe_mode; in intel_crtc_ddb_weight() local
4128 drm_mode_get_hv_timing(pipe_mode, &hdisplay, &vdisplay); in intel_crtc_ddb_weight()
5354 crtc_htotal = crtc_state->hw.pipe_mode.crtc_htotal; in intel_get_linetime_us()
5526 crtc_state->hw.pipe_mode.crtc_htotal, in skl_compute_plane_wm()
5533 if ((wp->cpp * crtc_state->hw.pipe_mode.crtc_htotal / in skl_compute_plane_wm()