Lines Matching refs:pri_latency
1098 dev_priv->wm.pri_latency[G4X_WM_LEVEL_NORMAL] = 5; in g4x_setup_wm_latency()
1099 dev_priv->wm.pri_latency[G4X_WM_LEVEL_SR] = 12; in g4x_setup_wm_latency()
1100 dev_priv->wm.pri_latency[G4X_WM_LEVEL_HPLL] = 35; in g4x_setup_wm_latency()
1155 unsigned int latency = dev_priv->wm.pri_latency[level] * 10; in g4x_compute_wm()
1656 dev_priv->wm.pri_latency[VLV_WM_LEVEL_PM2] = 3; in vlv_setup_wm_latency()
1661 dev_priv->wm.pri_latency[VLV_WM_LEVEL_PM5] = 12; in vlv_setup_wm_latency()
1662 dev_priv->wm.pri_latency[VLV_WM_LEVEL_DDR_DVFS] = 33; in vlv_setup_wm_latency()
1678 if (dev_priv->wm.pri_latency[level] == 0) in vlv_compute_wm_level()
1699 dev_priv->wm.pri_latency[level] * 10); in vlv_compute_wm_level()
2837 u16 pri_latency = dev_priv->wm.pri_latency[level]; in ilk_compute_wm_level() local
2843 pri_latency *= 5; in ilk_compute_wm_level()
2850 pri_latency, level); in ilk_compute_wm_level()
3065 changed = ilk_increase_wm_latency(dev_priv, dev_priv->wm.pri_latency, 12) | in snb_wm_latency_quirk()
3074 intel_print_wm_latency(dev_priv, "Primary", dev_priv->wm.pri_latency); in snb_wm_latency_quirk()
3092 if (dev_priv->wm.pri_latency[3] == 0 && in snb_wm_lp3_irq_quirk()
3097 dev_priv->wm.pri_latency[3] = 0; in snb_wm_lp3_irq_quirk()
3103 intel_print_wm_latency(dev_priv, "Primary", dev_priv->wm.pri_latency); in snb_wm_lp3_irq_quirk()
3110 intel_read_wm_latency(dev_priv, dev_priv->wm.pri_latency); in ilk_setup_wm_latency()
3112 memcpy(dev_priv->wm.spr_latency, dev_priv->wm.pri_latency, in ilk_setup_wm_latency()
3113 sizeof(dev_priv->wm.pri_latency)); in ilk_setup_wm_latency()
3114 memcpy(dev_priv->wm.cur_latency, dev_priv->wm.pri_latency, in ilk_setup_wm_latency()
3115 sizeof(dev_priv->wm.pri_latency)); in ilk_setup_wm_latency()
3120 intel_print_wm_latency(dev_priv, "Primary", dev_priv->wm.pri_latency); in ilk_setup_wm_latency()
3399 return dev_priv->wm.pri_latency[level]; in ilk_wm_lp_latency()
8041 if ((DISPLAY_VER(dev_priv) == 5 && dev_priv->wm.pri_latency[1] && in intel_init_pm()
8043 (DISPLAY_VER(dev_priv) != 5 && dev_priv->wm.pri_latency[0] && in intel_init_pm()