Lines Matching refs:uncore
108 struct intel_uncore *uncore = &i915->uncore; in vlv_save_gunit_s0ix_state() local
115 s->wr_watermark = intel_uncore_read(uncore, GEN7_WR_WATERMARK); in vlv_save_gunit_s0ix_state()
116 s->gfx_prio_ctrl = intel_uncore_read(uncore, GEN7_GFX_PRIO_CTRL); in vlv_save_gunit_s0ix_state()
117 s->arb_mode = intel_uncore_read(uncore, ARB_MODE); in vlv_save_gunit_s0ix_state()
118 s->gfx_pend_tlb0 = intel_uncore_read(uncore, GEN7_GFX_PEND_TLB0); in vlv_save_gunit_s0ix_state()
119 s->gfx_pend_tlb1 = intel_uncore_read(uncore, GEN7_GFX_PEND_TLB1); in vlv_save_gunit_s0ix_state()
122 s->lra_limits[i] = intel_uncore_read(uncore, GEN7_LRA_LIMITS(i)); in vlv_save_gunit_s0ix_state()
124 s->media_max_req_count = intel_uncore_read(uncore, GEN7_MEDIA_MAX_REQ_COUNT); in vlv_save_gunit_s0ix_state()
125 s->gfx_max_req_count = intel_uncore_read(uncore, GEN7_GFX_MAX_REQ_COUNT); in vlv_save_gunit_s0ix_state()
127 s->render_hwsp = intel_uncore_read(uncore, RENDER_HWS_PGA_GEN7); in vlv_save_gunit_s0ix_state()
128 s->ecochk = intel_uncore_read(uncore, GAM_ECOCHK); in vlv_save_gunit_s0ix_state()
129 s->bsd_hwsp = intel_uncore_read(uncore, BSD_HWS_PGA_GEN7); in vlv_save_gunit_s0ix_state()
130 s->blt_hwsp = intel_uncore_read(uncore, BLT_HWS_PGA_GEN7); in vlv_save_gunit_s0ix_state()
132 s->tlb_rd_addr = intel_uncore_read(uncore, GEN7_TLB_RD_ADDR); in vlv_save_gunit_s0ix_state()
135 s->g3dctl = intel_uncore_read(uncore, VLV_G3DCTL); in vlv_save_gunit_s0ix_state()
136 s->gsckgctl = intel_uncore_read(uncore, VLV_GSCKGCTL); in vlv_save_gunit_s0ix_state()
137 s->mbctl = intel_uncore_read(uncore, GEN6_MBCTL); in vlv_save_gunit_s0ix_state()
140 s->ucgctl1 = intel_uncore_read(uncore, GEN6_UCGCTL1); in vlv_save_gunit_s0ix_state()
141 s->ucgctl3 = intel_uncore_read(uncore, GEN6_UCGCTL3); in vlv_save_gunit_s0ix_state()
142 s->rcgctl1 = intel_uncore_read(uncore, GEN6_RCGCTL1); in vlv_save_gunit_s0ix_state()
143 s->rcgctl2 = intel_uncore_read(uncore, GEN6_RCGCTL2); in vlv_save_gunit_s0ix_state()
144 s->rstctl = intel_uncore_read(uncore, GEN6_RSTCTL); in vlv_save_gunit_s0ix_state()
145 s->misccpctl = intel_uncore_read(uncore, GEN7_MISCCPCTL); in vlv_save_gunit_s0ix_state()
148 s->gfxpause = intel_uncore_read(uncore, GEN6_GFXPAUSE); in vlv_save_gunit_s0ix_state()
149 s->rpdeuhwtc = intel_uncore_read(uncore, GEN6_RPDEUHWTC); in vlv_save_gunit_s0ix_state()
150 s->rpdeuc = intel_uncore_read(uncore, GEN6_RPDEUC); in vlv_save_gunit_s0ix_state()
151 s->ecobus = intel_uncore_read(uncore, ECOBUS); in vlv_save_gunit_s0ix_state()
152 s->pwrdwnupctl = intel_uncore_read(uncore, VLV_PWRDWNUPCTL); in vlv_save_gunit_s0ix_state()
153 s->rp_down_timeout = intel_uncore_read(uncore, GEN6_RP_DOWN_TIMEOUT); in vlv_save_gunit_s0ix_state()
154 s->rp_deucsw = intel_uncore_read(uncore, GEN6_RPDEUCSW); in vlv_save_gunit_s0ix_state()
155 s->rcubmabdtmr = intel_uncore_read(uncore, GEN6_RCUBMABDTMR); in vlv_save_gunit_s0ix_state()
156 s->rcedata = intel_uncore_read(uncore, VLV_RCEDATA); in vlv_save_gunit_s0ix_state()
157 s->spare2gh = intel_uncore_read(uncore, VLV_SPAREG2H); in vlv_save_gunit_s0ix_state()
160 s->gt_imr = intel_uncore_read(uncore, GTIMR); in vlv_save_gunit_s0ix_state()
161 s->gt_ier = intel_uncore_read(uncore, GTIER); in vlv_save_gunit_s0ix_state()
162 s->pm_imr = intel_uncore_read(uncore, GEN6_PMIMR); in vlv_save_gunit_s0ix_state()
163 s->pm_ier = intel_uncore_read(uncore, GEN6_PMIER); in vlv_save_gunit_s0ix_state()
166 s->gt_scratch[i] = intel_uncore_read(uncore, GEN7_GT_SCRATCH(i)); in vlv_save_gunit_s0ix_state()
169 s->tilectl = intel_uncore_read(uncore, TILECTL); in vlv_save_gunit_s0ix_state()
170 s->gt_fifoctl = intel_uncore_read(uncore, GTFIFOCTL); in vlv_save_gunit_s0ix_state()
171 s->gtlc_wake_ctrl = intel_uncore_read(uncore, VLV_GTLC_WAKE_CTRL); in vlv_save_gunit_s0ix_state()
172 s->gtlc_survive = intel_uncore_read(uncore, VLV_GTLC_SURVIVABILITY_REG); in vlv_save_gunit_s0ix_state()
173 s->pmwgicz = intel_uncore_read(uncore, VLV_PMWGICZ); in vlv_save_gunit_s0ix_state()
176 s->gu_ctl0 = intel_uncore_read(uncore, VLV_GU_CTL0); in vlv_save_gunit_s0ix_state()
177 s->gu_ctl1 = intel_uncore_read(uncore, VLV_GU_CTL1); in vlv_save_gunit_s0ix_state()
178 s->pcbr = intel_uncore_read(uncore, VLV_PCBR); in vlv_save_gunit_s0ix_state()
179 s->clock_gate_dis2 = intel_uncore_read(uncore, VLV_GUNIT_CLOCK_GATE2); in vlv_save_gunit_s0ix_state()
193 struct intel_uncore *uncore = &i915->uncore; in vlv_restore_gunit_s0ix_state() local
201 intel_uncore_write(uncore, GEN7_WR_WATERMARK, s->wr_watermark); in vlv_restore_gunit_s0ix_state()
202 intel_uncore_write(uncore, GEN7_GFX_PRIO_CTRL, s->gfx_prio_ctrl); in vlv_restore_gunit_s0ix_state()
203 intel_uncore_write(uncore, ARB_MODE, s->arb_mode | (0xffff << 16)); in vlv_restore_gunit_s0ix_state()
204 intel_uncore_write(uncore, GEN7_GFX_PEND_TLB0, s->gfx_pend_tlb0); in vlv_restore_gunit_s0ix_state()
205 intel_uncore_write(uncore, GEN7_GFX_PEND_TLB1, s->gfx_pend_tlb1); in vlv_restore_gunit_s0ix_state()
208 intel_uncore_write(uncore, GEN7_LRA_LIMITS(i), s->lra_limits[i]); in vlv_restore_gunit_s0ix_state()
210 intel_uncore_write(uncore, GEN7_MEDIA_MAX_REQ_COUNT, s->media_max_req_count); in vlv_restore_gunit_s0ix_state()
211 intel_uncore_write(uncore, GEN7_GFX_MAX_REQ_COUNT, s->gfx_max_req_count); in vlv_restore_gunit_s0ix_state()
213 intel_uncore_write(uncore, RENDER_HWS_PGA_GEN7, s->render_hwsp); in vlv_restore_gunit_s0ix_state()
214 intel_uncore_write(uncore, GAM_ECOCHK, s->ecochk); in vlv_restore_gunit_s0ix_state()
215 intel_uncore_write(uncore, BSD_HWS_PGA_GEN7, s->bsd_hwsp); in vlv_restore_gunit_s0ix_state()
216 intel_uncore_write(uncore, BLT_HWS_PGA_GEN7, s->blt_hwsp); in vlv_restore_gunit_s0ix_state()
218 intel_uncore_write(uncore, GEN7_TLB_RD_ADDR, s->tlb_rd_addr); in vlv_restore_gunit_s0ix_state()
221 intel_uncore_write(uncore, VLV_G3DCTL, s->g3dctl); in vlv_restore_gunit_s0ix_state()
222 intel_uncore_write(uncore, VLV_GSCKGCTL, s->gsckgctl); in vlv_restore_gunit_s0ix_state()
223 intel_uncore_write(uncore, GEN6_MBCTL, s->mbctl); in vlv_restore_gunit_s0ix_state()
226 intel_uncore_write(uncore, GEN6_UCGCTL1, s->ucgctl1); in vlv_restore_gunit_s0ix_state()
227 intel_uncore_write(uncore, GEN6_UCGCTL3, s->ucgctl3); in vlv_restore_gunit_s0ix_state()
228 intel_uncore_write(uncore, GEN6_RCGCTL1, s->rcgctl1); in vlv_restore_gunit_s0ix_state()
229 intel_uncore_write(uncore, GEN6_RCGCTL2, s->rcgctl2); in vlv_restore_gunit_s0ix_state()
230 intel_uncore_write(uncore, GEN6_RSTCTL, s->rstctl); in vlv_restore_gunit_s0ix_state()
231 intel_uncore_write(uncore, GEN7_MISCCPCTL, s->misccpctl); in vlv_restore_gunit_s0ix_state()
234 intel_uncore_write(uncore, GEN6_GFXPAUSE, s->gfxpause); in vlv_restore_gunit_s0ix_state()
235 intel_uncore_write(uncore, GEN6_RPDEUHWTC, s->rpdeuhwtc); in vlv_restore_gunit_s0ix_state()
236 intel_uncore_write(uncore, GEN6_RPDEUC, s->rpdeuc); in vlv_restore_gunit_s0ix_state()
237 intel_uncore_write(uncore, ECOBUS, s->ecobus); in vlv_restore_gunit_s0ix_state()
238 intel_uncore_write(uncore, VLV_PWRDWNUPCTL, s->pwrdwnupctl); in vlv_restore_gunit_s0ix_state()
239 intel_uncore_write(uncore, GEN6_RP_DOWN_TIMEOUT, s->rp_down_timeout); in vlv_restore_gunit_s0ix_state()
240 intel_uncore_write(uncore, GEN6_RPDEUCSW, s->rp_deucsw); in vlv_restore_gunit_s0ix_state()
241 intel_uncore_write(uncore, GEN6_RCUBMABDTMR, s->rcubmabdtmr); in vlv_restore_gunit_s0ix_state()
242 intel_uncore_write(uncore, VLV_RCEDATA, s->rcedata); in vlv_restore_gunit_s0ix_state()
243 intel_uncore_write(uncore, VLV_SPAREG2H, s->spare2gh); in vlv_restore_gunit_s0ix_state()
246 intel_uncore_write(uncore, GTIMR, s->gt_imr); in vlv_restore_gunit_s0ix_state()
247 intel_uncore_write(uncore, GTIER, s->gt_ier); in vlv_restore_gunit_s0ix_state()
248 intel_uncore_write(uncore, GEN6_PMIMR, s->pm_imr); in vlv_restore_gunit_s0ix_state()
249 intel_uncore_write(uncore, GEN6_PMIER, s->pm_ier); in vlv_restore_gunit_s0ix_state()
252 intel_uncore_write(uncore, GEN7_GT_SCRATCH(i), s->gt_scratch[i]); in vlv_restore_gunit_s0ix_state()
255 intel_uncore_write(uncore, TILECTL, s->tilectl); in vlv_restore_gunit_s0ix_state()
256 intel_uncore_write(uncore, GTFIFOCTL, s->gt_fifoctl); in vlv_restore_gunit_s0ix_state()
262 val = intel_uncore_read(uncore, VLV_GTLC_WAKE_CTRL); in vlv_restore_gunit_s0ix_state()
265 intel_uncore_write(uncore, VLV_GTLC_WAKE_CTRL, val); in vlv_restore_gunit_s0ix_state()
267 val = intel_uncore_read(uncore, VLV_GTLC_SURVIVABILITY_REG); in vlv_restore_gunit_s0ix_state()
270 intel_uncore_write(uncore, VLV_GTLC_SURVIVABILITY_REG, val); in vlv_restore_gunit_s0ix_state()
272 intel_uncore_write(uncore, VLV_PMWGICZ, s->pmwgicz); in vlv_restore_gunit_s0ix_state()
275 intel_uncore_write(uncore, VLV_GU_CTL0, s->gu_ctl0); in vlv_restore_gunit_s0ix_state()
276 intel_uncore_write(uncore, VLV_GU_CTL1, s->gu_ctl1); in vlv_restore_gunit_s0ix_state()
277 intel_uncore_write(uncore, VLV_PCBR, s->pcbr); in vlv_restore_gunit_s0ix_state()
278 intel_uncore_write(uncore, VLV_GUNIT_CLOCK_GATE2, s->clock_gate_dis2); in vlv_restore_gunit_s0ix_state()
296 intel_uncore_read_notrace(&i915->uncore, reg)) & mask) in vlv_wait_for_pw_status()
307 struct intel_uncore *uncore = &i915->uncore; in vlv_force_gfx_clock() local
311 val = intel_uncore_read(uncore, VLV_GTLC_SURVIVABILITY_REG); in vlv_force_gfx_clock()
315 intel_uncore_write(uncore, VLV_GTLC_SURVIVABILITY_REG, val); in vlv_force_gfx_clock()
320 err = intel_wait_for_register(uncore, in vlv_force_gfx_clock()
328 intel_uncore_read(uncore, VLV_GTLC_SURVIVABILITY_REG)); in vlv_force_gfx_clock()
335 struct intel_uncore *uncore = &i915->uncore; in vlv_allow_gt_wake() local
340 val = intel_uncore_read(uncore, VLV_GTLC_WAKE_CTRL); in vlv_allow_gt_wake()
344 intel_uncore_write(uncore, VLV_GTLC_WAKE_CTRL, val); in vlv_allow_gt_wake()
345 intel_uncore_posting_read(uncore, VLV_GTLC_WAKE_CTRL); in vlv_allow_gt_wake()
381 struct intel_uncore *uncore = &i915->uncore; in vlv_check_no_gt_access() local
383 if (!(intel_uncore_read(uncore, VLV_GTLC_PW_STATUS) & VLV_GTLC_ALLOWWAKEERR)) in vlv_check_no_gt_access()
387 intel_uncore_write(uncore, VLV_GTLC_PW_STATUS, VLV_GTLC_ALLOWWAKEERR); in vlv_check_no_gt_access()
406 (intel_uncore_read(&dev_priv->uncore, VLV_GTLC_WAKE_CTRL) & mask) != mask); in vlv_suspend_complete()