Lines Matching refs:N
110 #define LCD_LAYERn_CFG(N) (LCD_LAYER0_CFG + (0x400 * (N))) argument
177 #define LCD_LAYERn_COL_START(N) (LCD_LAYER0_COL_START + (0x400 * (N))) argument
179 #define LCD_LAYERn_ROW_START(N) (LCD_LAYER0_ROW_START + (0x400 * (N))) argument
181 #define LCD_LAYERn_WIDTH(N) (LCD_LAYER0_WIDTH + (0x400 * (N))) argument
183 #define LCD_LAYERn_HEIGHT(N) (LCD_LAYER0_HEIGHT + (0x400 * (N))) argument
185 #define LCD_LAYERn_SCALE_CFG(N) (LCD_LAYER0_SCALE_CFG + (0x400 * (N))) argument
187 #define LCD_LAYERn_ALPHA(N) (LCD_LAYER0_ALPHA + (0x400 * (N))) argument
189 #define LCD_LAYERn_INV_COLOUR_LS(N) (LCD_LAYER0_INV_COLOUR_LS + \ argument
190 (0x400 * (N)))
192 #define LCD_LAYERn_INV_COLOUR_MS(N) (LCD_LAYER0_INV_COLOUR_MS + \ argument
193 (0x400 * (N)))
195 #define LCD_LAYERn_TRANS_COLOUR_LS(N) (LCD_LAYER0_TRANS_COLOUR_LS + \ argument
196 (0x400 * (N)))
198 #define LCD_LAYERn_TRANS_COLOUR_MS(N) (LCD_LAYER0_TRANS_COLOUR_MS + \ argument
199 (0x400 * (N)))
201 #define LCD_LAYERn_CSC_COEFF11(N) (LCD_LAYER0_CSC_COEFF11 + (0x400 * (N))) argument
203 #define LCD_LAYERn_CSC_COEFF12(N) (LCD_LAYER0_CSC_COEFF12 + (0x400 * (N))) argument
205 #define LCD_LAYERn_CSC_COEFF13(N) (LCD_LAYER0_CSC_COEFF13 + (0x400 * (N))) argument
207 #define LCD_LAYERn_CSC_COEFF21(N) (LCD_LAYER0_CSC_COEFF21 + (0x400 * (N))) argument
209 #define LCD_LAYERn_CSC_COEFF22(N) (LCD_LAYER0_CSC_COEFF22 + (0x400 * (N))) argument
211 #define LCD_LAYERn_CSC_COEFF23(N) (LCD_LAYER0_CSC_COEFF23 + (0x400 * (N))) argument
213 #define LCD_LAYERn_CSC_COEFF31(N) (LCD_LAYER0_CSC_COEFF31 + (0x400 * (N))) argument
215 #define LCD_LAYERn_CSC_COEFF32(N) (LCD_LAYER0_CSC_COEFF32 + (0x400 * (N))) argument
217 #define LCD_LAYERn_CSC_COEFF33(N) (LCD_LAYER0_CSC_COEFF33 + (0x400 * (N))) argument
219 #define LCD_LAYERn_CSC_OFF1(N) (LCD_LAYER0_CSC_OFF1 + (0x400 * (N))) argument
221 #define LCD_LAYERn_CSC_OFF2(N) (LCD_LAYER0_CSC_OFF2 + (0x400 * (N))) argument
223 #define LCD_LAYERn_CSC_OFF3(N) (LCD_LAYER0_CSC_OFF3 + (0x400 * (N))) argument
227 #define LCD_LAYERn_DMA_CFG(N) (LCD_LAYER0_DMA_CFG + \ argument
228 (0x400 * (N)))
255 #define LCD_LAYERn_DMA_START_ADDR(N) (LCD_LAYER0_DMA_START_ADR \ argument
256 + (0x400 * (N)))
258 #define LCD_LAYERn_DMA_START_SHADOW(N) (LCD_LAYER0_DMA_START_SHADOW \ argument
259 + (0x400 * (N)))
261 #define LCD_LAYERn_DMA_LEN(N) (LCD_LAYER0_DMA_LEN + \ argument
262 (0x400 * (N)))
264 #define LCD_LAYERn_DMA_LEN_SHADOW(N) (LCD_LAYER0_DMA_LEN_SHADOW + \ argument
265 (0x400 * (N)))
267 #define LCD_LAYERn_DMA_STATUS(N) (LCD_LAYER0_DMA_STATUS + \ argument
268 (0x400 * (N)))
270 #define LCD_LAYERn_DMA_LINE_WIDTH(N) (LCD_LAYER0_DMA_LINE_WIDTH + \ argument
271 (0x400 * (N)))
273 #define LCD_LAYERn_DMA_LINE_VSTRIDE(N) (LCD_LAYER0_DMA_LINE_VSTRIDE +\ argument
274 (0x400 * (N)))
276 #define LCD_LAYERn_DMA_FIFO_STATUS(N) (LCD_LAYER0_DMA_FIFO_STATUS + \ argument
277 (0x400 * (N)))
279 #define LCD_LAYERn_CFG2(N) (LCD_LAYER0_CFG2 + (0x400 * (N))) argument
281 #define LCD_LAYERn_DMA_START_CB_ADR(N) (LCD_LAYER0_DMA_START_CB_ADR + \ argument
282 (0x20 * (N)))
284 #define LCD_LAYERn_DMA_START_CB_SHADOW(N) (LCD_LAYER0_DMA_START_CB_SHADOW\ argument
285 + (0x20 * (N)))
287 #define LCD_LAYERn_DMA_CB_LINE_WIDTH(N) (LCD_LAYER0_DMA_CB_LINE_WIDTH +\ argument
288 (0x20 * (N)))
290 #define LCD_LAYERn_DMA_CB_LINE_VSTRIDE(N) (LCD_LAYER0_DMA_CB_LINE_VSTRIDE\ argument
291 + (0x20 * (N)))
293 #define LCD_LAYERn_DMA_START_CR_ADR(N) (LCD_LAYER0_DMA_START_CR_ADR + \ argument
294 (0x20 * (N)))
296 #define LCD_LAYERn_DMA_START_CR_SHADOW(N) \ argument
298 + (0x20 * (N)))
300 #define LCD_LAYERn_DMA_CR_LINE_WIDTH(N) (LCD_LAYER0_DMA_CR_LINE_WIDTH +\ argument
301 (0x20 * (N)))
303 #define LCD_LAYERn_DMA_CR_LINE_VSTRIDE(N) (LCD_LAYER0_DMA_CR_LINE_VSTRIDE\ argument
304 + (0x20 * (N)))
435 #define MIPI_TXm_HS_FGn_SECTo_PH(M, N, O) (MIPI_TX0_HS_FG0_SECT0_PH + \ argument
436 HS_OFFSET(M) + (0x2C * (N)) \
448 #define MIPI_TXm_HS_FGn_SECT_UNPACKED_BYTES0(M, N) \ argument
450 + HS_OFFSET(M) + (0x2C * (N)))
452 #define MIPI_TXm_HS_FGn_SECTo_LINE_CFG(M, N, O) \ argument
454 + (0x2C * (N)) + (8 * (O)))
457 #define MIPI_TXm_HS_FGn_NUM_LINES(M, N) \ argument
459 + (0x2C * (N)))
461 #define MIPI_TXm_HS_VSYNC_WIDTHn(M, N) \ argument
463 + (0x4 * (N)))
465 #define MIPI_TXm_HS_V_BACKPORCHESn(M, N) \ argument
467 + (0x4 * (N)))
469 #define MIPI_TXm_HS_V_FRONTPORCHESn(M, N) \ argument
471 + (0x4 * (N)))
473 #define MIPI_TXm_HS_V_ACTIVEn(M, N) \ argument
475 + (0x4 * (N)))
477 #define MIPI_TXm_HS_HSYNC_WIDTHn(M, N) \ argument
479 + (0x4 * (N)))
481 #define MIPI_TXm_HS_H_BACKPORCHn(M, N) \ argument
483 + (0x4 * (N)))
485 #define MIPI_TXm_HS_H_FRONTPORCHn(M, N) \ argument
487 + (0x4 * (N)))
489 #define MIPI_TXm_HS_H_ACTIVEn(M, N) \ argument
491 + (0x4 * (N)))
493 #define MIPI_TXm_HS_LLP_HSYNC_WIDTHn(M, N) \ argument
495 + (0x4 * (N)))
497 #define MIPI_TXm_HS_LLP_H_BACKPORCHn(M, N) \ argument
499 + (0x4 * (N)))
501 #define MIPI_TXm_HS_LLP_H_FRONTPORCHn(M, N) \ argument
503 + (0x4 * (N)))
511 #define MIPI_TXm_HS_MC_FIFO_CHAN_ALLOCn(M, N) \ argument
513 + (0x4 * (N)))
520 #define MIPI_TXm_HS_MC_FIFO_RTHRESHOLDn(M, N) \ argument
522 + (0x4 * (N)))
545 #define SET_MIPI_CTRL_IRQ_ENABLE0(dev, M, N) kmb_set_bit_mipi(dev, \ argument
547 (M) + (N))
554 #define SET_MIPI_CTRL_IRQ_CLEAR0(dev, M, N) \ argument
555 kmb_set_bit_mipi(dev, MIPI_CTRL_IRQ_CLEAR0, (M) + (N))
557 #define SET_MIPI_CTRL_IRQ_CLEAR1(dev, M, N) \ argument
558 kmb_set_bit_mipi(dev, MIPI_CTRL_IRQ_CLEAR1, (M) + (N))
628 #define TP_SEL_VCm(M, N) \ argument
629 ((N) << (((M) * 0x04) + 1))