Lines Matching defs:i0
1071 static inline uint32_t REG_A6XX_CP_SCRATCH(uint32_t i0) { return 0x00000883 + 0x1*i0; } in REG_A6XX_CP_SCRATCH()
1073 static inline uint32_t REG_A6XX_CP_SCRATCH_REG(uint32_t i0) { return 0x00000883 + 0x1*i0; } in REG_A6XX_CP_SCRATCH_REG()
1075 static inline uint32_t REG_A6XX_CP_PROTECT(uint32_t i0) { return 0x00000850 + 0x1*i0; } in REG_A6XX_CP_PROTECT()
1077 static inline uint32_t REG_A6XX_CP_PROTECT_REG(uint32_t i0) { return 0x00000850 + 0x1*i0; } in REG_A6XX_CP_PROTECT_REG()
1110 static inline uint32_t REG_A6XX_CP_PERFCTR_CP_SEL(uint32_t i0) { return 0x000008d0 + 0x1*i0; } in REG_A6XX_CP_PERFCTR_CP_SEL()
1245 static inline uint32_t REG_A6XX_RBBM_PERFCTR_CP(uint32_t i0) { return 0x00000400 + 0x2*i0; } in REG_A6XX_RBBM_PERFCTR_CP()
1247 static inline uint32_t REG_A6XX_RBBM_PERFCTR_RBBM(uint32_t i0) { return 0x0000041c + 0x2*i0; } in REG_A6XX_RBBM_PERFCTR_RBBM()
1249 static inline uint32_t REG_A6XX_RBBM_PERFCTR_PC(uint32_t i0) { return 0x00000424 + 0x2*i0; } in REG_A6XX_RBBM_PERFCTR_PC()
1251 static inline uint32_t REG_A6XX_RBBM_PERFCTR_VFD(uint32_t i0) { return 0x00000434 + 0x2*i0; } in REG_A6XX_RBBM_PERFCTR_VFD()
1253 static inline uint32_t REG_A6XX_RBBM_PERFCTR_HLSQ(uint32_t i0) { return 0x00000444 + 0x2*i0; } in REG_A6XX_RBBM_PERFCTR_HLSQ()
1255 static inline uint32_t REG_A6XX_RBBM_PERFCTR_VPC(uint32_t i0) { return 0x00000450 + 0x2*i0; } in REG_A6XX_RBBM_PERFCTR_VPC()
1257 static inline uint32_t REG_A6XX_RBBM_PERFCTR_CCU(uint32_t i0) { return 0x0000045c + 0x2*i0; } in REG_A6XX_RBBM_PERFCTR_CCU()
1259 static inline uint32_t REG_A6XX_RBBM_PERFCTR_TSE(uint32_t i0) { return 0x00000466 + 0x2*i0; } in REG_A6XX_RBBM_PERFCTR_TSE()
1261 static inline uint32_t REG_A6XX_RBBM_PERFCTR_RAS(uint32_t i0) { return 0x0000046e + 0x2*i0; } in REG_A6XX_RBBM_PERFCTR_RAS()
1263 static inline uint32_t REG_A6XX_RBBM_PERFCTR_UCHE(uint32_t i0) { return 0x00000476 + 0x2*i0; } in REG_A6XX_RBBM_PERFCTR_UCHE()
1265 static inline uint32_t REG_A6XX_RBBM_PERFCTR_TP(uint32_t i0) { return 0x0000048e + 0x2*i0; } in REG_A6XX_RBBM_PERFCTR_TP()
1267 static inline uint32_t REG_A6XX_RBBM_PERFCTR_SP(uint32_t i0) { return 0x000004a6 + 0x2*i0; } in REG_A6XX_RBBM_PERFCTR_SP()
1269 static inline uint32_t REG_A6XX_RBBM_PERFCTR_RB(uint32_t i0) { return 0x000004d6 + 0x2*i0; } in REG_A6XX_RBBM_PERFCTR_RB()
1271 static inline uint32_t REG_A6XX_RBBM_PERFCTR_VSC(uint32_t i0) { return 0x000004e6 + 0x2*i0; } in REG_A6XX_RBBM_PERFCTR_VSC()
1273 static inline uint32_t REG_A6XX_RBBM_PERFCTR_LRZ(uint32_t i0) { return 0x000004ea + 0x2*i0; } in REG_A6XX_RBBM_PERFCTR_LRZ()
1275 static inline uint32_t REG_A6XX_RBBM_PERFCTR_CMP(uint32_t i0) { return 0x000004f2 + 0x2*i0; } in REG_A6XX_RBBM_PERFCTR_CMP()
1291 static inline uint32_t REG_A6XX_RBBM_PERFCTR_RBBM_SEL(uint32_t i0) { return 0x00000507 + 0x1*i0; } in REG_A6XX_RBBM_PERFCTR_RBBM_SEL()
1764 static inline uint32_t REG_A6XX_VSC_PERFCTR_VSC_SEL(uint32_t i0) { return 0x00000cd8 + 0x1*i0; } in REG_A6XX_VSC_PERFCTR_VSC_SEL()
1806 static inline uint32_t REG_A6XX_UCHE_PERFCTR_UCHE_SEL(uint32_t i0) { return 0x00000e1c + 0x1*i0; } in REG_A6XX_UCHE_PERFCTR_UCHE_SEL()
1967 static inline uint32_t REG_A6XX_VSC_PIPE_CONFIG(uint32_t i0) { return 0x00000c10 + 0x1*i0; } in REG_A6XX_VSC_PIPE_CONFIG()
1969 static inline uint32_t REG_A6XX_VSC_PIPE_CONFIG_REG(uint32_t i0) { return 0x00000c10 + 0x1*i0; } in REG_A6XX_VSC_PIPE_CONFIG_REG()
2007 static inline uint32_t REG_A6XX_VSC_STATE(uint32_t i0) { return 0x00000c38 + 0x1*i0; } in REG_A6XX_VSC_STATE()
2009 static inline uint32_t REG_A6XX_VSC_STATE_REG(uint32_t i0) { return 0x00000c38 + 0x1*i0; } in REG_A6XX_VSC_STATE_REG()
2011 static inline uint32_t REG_A6XX_VSC_PRIM_STRM_SIZE(uint32_t i0) { return 0x00000c58 + 0x1*i0; } in REG_A6XX_VSC_PRIM_STRM_SIZE()
2013 static inline uint32_t REG_A6XX_VSC_PRIM_STRM_SIZE_REG(uint32_t i0) { return 0x00000c58 + 0x1*i0; } in REG_A6XX_VSC_PRIM_STRM_SIZE_REG()
2015 static inline uint32_t REG_A6XX_VSC_DRAW_STRM_SIZE(uint32_t i0) { return 0x00000c78 + 0x1*i0; } in REG_A6XX_VSC_DRAW_STRM_SIZE()
2017 static inline uint32_t REG_A6XX_VSC_DRAW_STRM_SIZE_REG(uint32_t i0) { return 0x00000c78 + 0x1*i0; } in REG_A6XX_VSC_DRAW_STRM_SIZE_REG()
2103 static inline uint32_t REG_A6XX_GRAS_CL_VPORT(uint32_t i0) { return 0x00008010 + 0x6*i0; } in REG_A6XX_GRAS_CL_VPORT()
2105 static inline uint32_t REG_A6XX_GRAS_CL_VPORT_XOFFSET(uint32_t i0) { return 0x00008010 + 0x6*i0; } in REG_A6XX_GRAS_CL_VPORT_XOFFSET()
2113 static inline uint32_t REG_A6XX_GRAS_CL_VPORT_XSCALE(uint32_t i0) { return 0x00008011 + 0x6*i0; } in REG_A6XX_GRAS_CL_VPORT_XSCALE()
2121 static inline uint32_t REG_A6XX_GRAS_CL_VPORT_YOFFSET(uint32_t i0) { return 0x00008012 + 0x6*i0; } in REG_A6XX_GRAS_CL_VPORT_YOFFSET()
2129 static inline uint32_t REG_A6XX_GRAS_CL_VPORT_YSCALE(uint32_t i0) { return 0x00008013 + 0x6*i0; } in REG_A6XX_GRAS_CL_VPORT_YSCALE()
2137 static inline uint32_t REG_A6XX_GRAS_CL_VPORT_ZOFFSET(uint32_t i0) { return 0x00008014 + 0x6*i0; } in REG_A6XX_GRAS_CL_VPORT_ZOFFSET()
2145 static inline uint32_t REG_A6XX_GRAS_CL_VPORT_ZSCALE(uint32_t i0) { return 0x00008015 + 0x6*i0; } in REG_A6XX_GRAS_CL_VPORT_ZSCALE()
2153 static inline uint32_t REG_A6XX_GRAS_CL_Z_CLAMP(uint32_t i0) { return 0x00008070 + 0x2*i0; } in REG_A6XX_GRAS_CL_Z_CLAMP()
2155 static inline uint32_t REG_A6XX_GRAS_CL_Z_CLAMP_MIN(uint32_t i0) { return 0x00008070 + 0x2*i0; } in REG_A6XX_GRAS_CL_Z_CLAMP_MIN()
2163 static inline uint32_t REG_A6XX_GRAS_CL_Z_CLAMP_MAX(uint32_t i0) { return 0x00008071 + 0x2*i0; } in REG_A6XX_GRAS_CL_Z_CLAMP_MAX()
2459 static inline uint32_t REG_A6XX_GRAS_SC_SCREEN_SCISSOR(uint32_t i0) { return 0x000080b0 + 0x2*i0; } in REG_A6XX_GRAS_SC_SCREEN_SCISSOR()
2461 static inline uint32_t REG_A6XX_GRAS_SC_SCREEN_SCISSOR_TL(uint32_t i0) { return 0x000080b0 + 0x2*i0… in REG_A6XX_GRAS_SC_SCREEN_SCISSOR_TL()
2475 static inline uint32_t REG_A6XX_GRAS_SC_SCREEN_SCISSOR_BR(uint32_t i0) { return 0x000080b1 + 0x2*i0… in REG_A6XX_GRAS_SC_SCREEN_SCISSOR_BR()
2489 static inline uint32_t REG_A6XX_GRAS_SC_VIEWPORT_SCISSOR(uint32_t i0) { return 0x000080d0 + 0x2*i0;… in REG_A6XX_GRAS_SC_VIEWPORT_SCISSOR()
2491 static inline uint32_t REG_A6XX_GRAS_SC_VIEWPORT_SCISSOR_TL(uint32_t i0) { return 0x000080d0 + 0x2*… in REG_A6XX_GRAS_SC_VIEWPORT_SCISSOR_TL()
2505 static inline uint32_t REG_A6XX_GRAS_SC_VIEWPORT_SCISSOR_BR(uint32_t i0) { return 0x000080d1 + 0x2*… in REG_A6XX_GRAS_SC_VIEWPORT_SCISSOR_BR()
2747 static inline uint32_t REG_A6XX_GRAS_PERFCTR_TSE_SEL(uint32_t i0) { return 0x00008610 + 0x1*i0; } in REG_A6XX_GRAS_PERFCTR_TSE_SEL()
2749 static inline uint32_t REG_A6XX_GRAS_PERFCTR_RAS_SEL(uint32_t i0) { return 0x00008614 + 0x1*i0; } in REG_A6XX_GRAS_PERFCTR_RAS_SEL()
2751 static inline uint32_t REG_A6XX_GRAS_PERFCTR_LRZ_SEL(uint32_t i0) { return 0x00008618 + 0x1*i0; } in REG_A6XX_GRAS_PERFCTR_LRZ_SEL()
3113 static inline uint32_t REG_A6XX_RB_MRT(uint32_t i0) { return 0x00008820 + 0x8*i0; } in REG_A6XX_RB_MRT()
3115 static inline uint32_t REG_A6XX_RB_MRT_CONTROL(uint32_t i0) { return 0x00008820 + 0x8*i0; } in REG_A6XX_RB_MRT_CONTROL()
3132 static inline uint32_t REG_A6XX_RB_MRT_BLEND_CONTROL(uint32_t i0) { return 0x00008821 + 0x8*i0; } in REG_A6XX_RB_MRT_BLEND_CONTROL()
3170 static inline uint32_t REG_A6XX_RB_MRT_BUF_INFO(uint32_t i0) { return 0x00008822 + 0x8*i0; } in REG_A6XX_RB_MRT_BUF_INFO()
3196 static inline uint32_t REG_A6XX_RB_MRT_PITCH(uint32_t i0) { return 0x00008823 + 0x8*i0; } in REG_A6XX_RB_MRT_PITCH()
3204 static inline uint32_t REG_A6XX_RB_MRT_ARRAY_PITCH(uint32_t i0) { return 0x00008824 + 0x8*i0; } in REG_A6XX_RB_MRT_ARRAY_PITCH()
3212 static inline uint32_t REG_A6XX_RB_MRT_BASE(uint32_t i0) { return 0x00008825 + 0x8*i0; } in REG_A6XX_RB_MRT_BASE()
3220 static inline uint32_t REG_A6XX_RB_MRT_BASE_GMEM(uint32_t i0) { return 0x00008827 + 0x8*i0; } in REG_A6XX_RB_MRT_BASE_GMEM()
3790 static inline uint32_t REG_A6XX_RB_MRT_FLAG_BUFFER(uint32_t i0) { return 0x00008903 + 0x3*i0; } in REG_A6XX_RB_MRT_FLAG_BUFFER()
3792 static inline uint32_t REG_A6XX_RB_MRT_FLAG_BUFFER_ADDR(uint32_t i0) { return 0x00008903 + 0x3*i0; } in REG_A6XX_RB_MRT_FLAG_BUFFER_ADDR()
3800 static inline uint32_t REG_A6XX_RB_MRT_FLAG_BUFFER_PITCH(uint32_t i0) { return 0x00008905 + 0x3*i0;… in REG_A6XX_RB_MRT_FLAG_BUFFER_PITCH()
4033 static inline uint32_t REG_A6XX_RB_PERFCTR_RB_SEL(uint32_t i0) { return 0x00008e10 + 0x1*i0; } in REG_A6XX_RB_PERFCTR_RB_SEL()
4035 static inline uint32_t REG_A6XX_RB_PERFCTR_CCU_SEL(uint32_t i0) { return 0x00008e18 + 0x1*i0; } in REG_A6XX_RB_PERFCTR_CCU_SEL()
4039 static inline uint32_t REG_A6XX_RB_PERFCTR_CMP_SEL(uint32_t i0) { return 0x00008e2c + 0x1*i0; } in REG_A6XX_RB_PERFCTR_CMP_SEL()
4171 static inline uint32_t REG_A6XX_VPC_VARYING_INTERP(uint32_t i0) { return 0x00009200 + 0x1*i0; } in REG_A6XX_VPC_VARYING_INTERP()
4173 static inline uint32_t REG_A6XX_VPC_VARYING_INTERP_MODE(uint32_t i0) { return 0x00009200 + 0x1*i0; } in REG_A6XX_VPC_VARYING_INTERP_MODE()
4175 static inline uint32_t REG_A6XX_VPC_VARYING_PS_REPL(uint32_t i0) { return 0x00009208 + 0x1*i0; } in REG_A6XX_VPC_VARYING_PS_REPL()
4177 static inline uint32_t REG_A6XX_VPC_VARYING_PS_REPL_MODE(uint32_t i0) { return 0x00009208 + 0x1*i0;… in REG_A6XX_VPC_VARYING_PS_REPL_MODE()
4183 static inline uint32_t REG_A6XX_VPC_VAR(uint32_t i0) { return 0x00009212 + 0x1*i0; } in REG_A6XX_VPC_VAR()
4185 static inline uint32_t REG_A6XX_VPC_VAR_DISABLE(uint32_t i0) { return 0x00009212 + 0x1*i0; } in REG_A6XX_VPC_VAR_DISABLE()
4232 static inline uint32_t REG_A6XX_VPC_SO(uint32_t i0) { return 0x0000921a + 0x7*i0; } in REG_A6XX_VPC_SO()
4234 static inline uint32_t REG_A6XX_VPC_SO_BUFFER_BASE(uint32_t i0) { return 0x0000921a + 0x7*i0; } in REG_A6XX_VPC_SO_BUFFER_BASE()
4242 static inline uint32_t REG_A6XX_VPC_SO_BUFFER_SIZE(uint32_t i0) { return 0x0000921c + 0x7*i0; } in REG_A6XX_VPC_SO_BUFFER_SIZE()
4250 static inline uint32_t REG_A6XX_VPC_SO_NCOMP(uint32_t i0) { return 0x0000921d + 0x7*i0; } in REG_A6XX_VPC_SO_NCOMP()
4252 static inline uint32_t REG_A6XX_VPC_SO_BUFFER_OFFSET(uint32_t i0) { return 0x0000921e + 0x7*i0; } in REG_A6XX_VPC_SO_BUFFER_OFFSET()
4260 static inline uint32_t REG_A6XX_VPC_SO_FLUSH_BASE(uint32_t i0) { return 0x0000921f + 0x7*i0; } in REG_A6XX_VPC_SO_FLUSH_BASE()
4415 static inline uint32_t REG_A6XX_VPC_PERFCTR_VPC_SEL(uint32_t i0) { return 0x00009604 + 0x1*i0; } in REG_A6XX_VPC_PERFCTR_VPC_SEL()
4721 static inline uint32_t REG_A6XX_PC_PERFCTR_PC_SEL(uint32_t i0) { return 0x00009e34 + 0x1*i0; } in REG_A6XX_PC_PERFCTR_PC_SEL()
4853 static inline uint32_t REG_A6XX_VFD_FETCH(uint32_t i0) { return 0x0000a010 + 0x4*i0; } in REG_A6XX_VFD_FETCH()
4855 static inline uint32_t REG_A6XX_VFD_FETCH_BASE(uint32_t i0) { return 0x0000a010 + 0x4*i0; } in REG_A6XX_VFD_FETCH_BASE()
4863 static inline uint32_t REG_A6XX_VFD_FETCH_SIZE(uint32_t i0) { return 0x0000a012 + 0x4*i0; } in REG_A6XX_VFD_FETCH_SIZE()
4865 static inline uint32_t REG_A6XX_VFD_FETCH_STRIDE(uint32_t i0) { return 0x0000a013 + 0x4*i0; } in REG_A6XX_VFD_FETCH_STRIDE()
4867 static inline uint32_t REG_A6XX_VFD_DECODE(uint32_t i0) { return 0x0000a090 + 0x2*i0; } in REG_A6XX_VFD_DECODE()
4869 static inline uint32_t REG_A6XX_VFD_DECODE_INSTR(uint32_t i0) { return 0x0000a090 + 0x2*i0; } in REG_A6XX_VFD_DECODE_INSTR()
4898 static inline uint32_t REG_A6XX_VFD_DECODE_STEP_RATE(uint32_t i0) { return 0x0000a091 + 0x2*i0; } in REG_A6XX_VFD_DECODE_STEP_RATE()
4900 static inline uint32_t REG_A6XX_VFD_DEST_CNTL(uint32_t i0) { return 0x0000a0d0 + 0x1*i0; } in REG_A6XX_VFD_DEST_CNTL()
4902 static inline uint32_t REG_A6XX_VFD_DEST_CNTL_INSTR(uint32_t i0) { return 0x0000a0d0 + 0x1*i0; } in REG_A6XX_VFD_DEST_CNTL_INSTR()
4920 static inline uint32_t REG_A6XX_VFD_PERFCTR_VFD_SEL(uint32_t i0) { return 0x0000a610 + 0x1*i0; } in REG_A6XX_VFD_PERFCTR_VFD_SEL()
4967 static inline uint32_t REG_A6XX_SP_VS_OUT(uint32_t i0) { return 0x0000a803 + 0x1*i0; } in REG_A6XX_SP_VS_OUT()
4969 static inline uint32_t REG_A6XX_SP_VS_OUT_REG(uint32_t i0) { return 0x0000a803 + 0x1*i0; } in REG_A6XX_SP_VS_OUT_REG()
4995 static inline uint32_t REG_A6XX_SP_VS_VPC_DST(uint32_t i0) { return 0x0000a813 + 0x1*i0; } in REG_A6XX_SP_VS_VPC_DST()
4997 static inline uint32_t REG_A6XX_SP_VS_VPC_DST_REG(uint32_t i0) { return 0x0000a813 + 0x1*i0; } in REG_A6XX_SP_VS_VPC_DST_REG()
5255 static inline uint32_t REG_A6XX_SP_DS_OUT(uint32_t i0) { return 0x0000a843 + 0x1*i0; } in REG_A6XX_SP_DS_OUT()
5257 static inline uint32_t REG_A6XX_SP_DS_OUT_REG(uint32_t i0) { return 0x0000a843 + 0x1*i0; } in REG_A6XX_SP_DS_OUT_REG()
5283 static inline uint32_t REG_A6XX_SP_DS_VPC_DST(uint32_t i0) { return 0x0000a853 + 0x1*i0; } in REG_A6XX_SP_DS_VPC_DST()
5285 static inline uint32_t REG_A6XX_SP_DS_VPC_DST_REG(uint32_t i0) { return 0x0000a853 + 0x1*i0; } in REG_A6XX_SP_DS_VPC_DST_REG()
5435 static inline uint32_t REG_A6XX_SP_GS_OUT(uint32_t i0) { return 0x0000a874 + 0x1*i0; } in REG_A6XX_SP_GS_OUT()
5437 static inline uint32_t REG_A6XX_SP_GS_OUT_REG(uint32_t i0) { return 0x0000a874 + 0x1*i0; } in REG_A6XX_SP_GS_OUT_REG()
5463 static inline uint32_t REG_A6XX_SP_GS_VPC_DST(uint32_t i0) { return 0x0000a884 + 0x1*i0; } in REG_A6XX_SP_GS_VPC_DST()
5465 static inline uint32_t REG_A6XX_SP_GS_VPC_DST_REG(uint32_t i0) { return 0x0000a884 + 0x1*i0; } in REG_A6XX_SP_GS_VPC_DST_REG()
5822 static inline uint32_t REG_A6XX_SP_FS_OUTPUT(uint32_t i0) { return 0x0000a98e + 0x1*i0; } in REG_A6XX_SP_FS_OUTPUT()
5824 static inline uint32_t REG_A6XX_SP_FS_OUTPUT_REG(uint32_t i0) { return 0x0000a98e + 0x1*i0; } in REG_A6XX_SP_FS_OUTPUT_REG()
5833 static inline uint32_t REG_A6XX_SP_FS_MRT(uint32_t i0) { return 0x0000a996 + 0x1*i0; } in REG_A6XX_SP_FS_MRT()
5835 static inline uint32_t REG_A6XX_SP_FS_MRT_REG(uint32_t i0) { return 0x0000a996 + 0x1*i0; } in REG_A6XX_SP_FS_MRT_REG()
5867 static inline uint32_t REG_A6XX_SP_FS_PREFETCH(uint32_t i0) { return 0x0000a99f + 0x1*i0; } in REG_A6XX_SP_FS_PREFETCH()
5869 static inline uint32_t REG_A6XX_SP_FS_PREFETCH_CMD(uint32_t i0) { return 0x0000a99f + 0x1*i0; } in REG_A6XX_SP_FS_PREFETCH_CMD()
5908 static inline uint32_t REG_A6XX_SP_FS_BINDLESS_PREFETCH(uint32_t i0) { return 0x0000a9a3 + 0x1*i0; } in REG_A6XX_SP_FS_BINDLESS_PREFETCH()
5910 static inline uint32_t REG_A6XX_SP_FS_BINDLESS_PREFETCH_CMD(uint32_t i0) { return 0x0000a9a3 + 0x1*… in REG_A6XX_SP_FS_BINDLESS_PREFETCH_CMD()
6095 static inline uint32_t REG_A6XX_SP_CS_BINDLESS_BASE(uint32_t i0) { return 0x0000a9e8 + 0x2*i0; } in REG_A6XX_SP_CS_BINDLESS_BASE()
6097 static inline uint32_t REG_A6XX_SP_CS_BINDLESS_BASE_ADDR(uint32_t i0) { return 0x0000a9e8 + 0x2*i0;… in REG_A6XX_SP_CS_BINDLESS_BASE_ADDR()
6142 static inline uint32_t REG_A6XX_SP_BINDLESS_BASE(uint32_t i0) { return 0x0000ab10 + 0x2*i0; } in REG_A6XX_SP_BINDLESS_BASE()
6144 static inline uint32_t REG_A6XX_SP_BINDLESS_BASE_ADDR(uint32_t i0) { return 0x0000ab10 + 0x2*i0; } in REG_A6XX_SP_BINDLESS_BASE_ADDR()
6193 static inline uint32_t REG_A6XX_SP_PERFCTR_SP_SEL(uint32_t i0) { return 0x0000ae10 + 0x1*i0; } in REG_A6XX_SP_PERFCTR_SP_SEL()
6542 static inline uint32_t REG_A6XX_TPL1_PERFCTR_TP_SEL(uint32_t i0) { return 0x0000b610 + 0x1*i0; } in REG_A6XX_TPL1_PERFCTR_TP_SEL()
6846 static inline uint32_t REG_A6XX_HLSQ_CS_BINDLESS_BASE(uint32_t i0) { return 0x0000b9c0 + 0x2*i0; } in REG_A6XX_HLSQ_CS_BINDLESS_BASE()
6848 static inline uint32_t REG_A6XX_HLSQ_CS_BINDLESS_BASE_ADDR(uint32_t i0) { return 0x0000b9c0 + 0x2*i… in REG_A6XX_HLSQ_CS_BINDLESS_BASE_ADDR()
6916 static inline uint32_t REG_A6XX_HLSQ_BINDLESS_BASE(uint32_t i0) { return 0x0000bb20 + 0x2*i0; } in REG_A6XX_HLSQ_BINDLESS_BASE()
6918 static inline uint32_t REG_A6XX_HLSQ_BINDLESS_BASE_ADDR(uint32_t i0) { return 0x0000bb20 + 0x2*i0; } in REG_A6XX_HLSQ_BINDLESS_BASE_ADDR()
6944 static inline uint32_t REG_A6XX_HLSQ_PERFCTR_HLSQ_SEL(uint32_t i0) { return 0x0000be10 + 0x1*i0; } in REG_A6XX_HLSQ_PERFCTR_HLSQ_SEL()