Lines Matching refs:lm
271 blend_cfg = ctl_read(ctl, REG_MDP5_CTL_LAYER_REG(ctl->id, mixer->lm)); in mdp5_ctl_set_cursor()
278 ctl_write(ctl, REG_MDP5_CTL_LAYER_REG(ctl->id, mixer->lm), blend_cfg); in mdp5_ctl_set_cursor()
393 ctl_write(ctl, REG_MDP5_CTL_LAYER_REG(ctl->id, mixer->lm), blend_cfg); in mdp5_ctl_blend()
394 ctl_write(ctl, REG_MDP5_CTL_LAYER_EXT_REG(ctl->id, mixer->lm), in mdp5_ctl_blend()
397 ctl_write(ctl, REG_MDP5_CTL_LAYER_REG(ctl->id, r_mixer->lm), in mdp5_ctl_blend()
399 ctl_write(ctl, REG_MDP5_CTL_LAYER_EXT_REG(ctl->id, r_mixer->lm), in mdp5_ctl_blend()
404 ctl->pending_ctl_trigger = mdp_ctl_flush_mask_lm(mixer->lm); in mdp5_ctl_blend()
406 ctl->pending_ctl_trigger |= mdp_ctl_flush_mask_lm(r_mixer->lm); in mdp5_ctl_blend()
408 DBG("lm%d: blend config = 0x%08x. ext_cfg = 0x%08x", mixer->lm, in mdp5_ctl_blend()
412 r_mixer->lm, r_blend_cfg, r_blend_ext_cfg); in mdp5_ctl_blend()
459 u32 mdp_ctl_flush_mask_lm(int lm) in mdp_ctl_flush_mask_lm() argument
461 switch (lm) { in mdp_ctl_flush_mask_lm()
482 sw_mask |= mdp_ctl_flush_mask_lm(pipeline->mixer->lm); in fix_sw_flush()
716 ctl_mgr->nlm = hw_cfg->lm.count; in mdp5_ctlm_init()