Lines Matching refs:val
147 static inline uint32_t DSI_6G_HW_VERSION_MAJOR(uint32_t val) in DSI_6G_HW_VERSION_MAJOR() argument
149 return ((val) << DSI_6G_HW_VERSION_MAJOR__SHIFT) & DSI_6G_HW_VERSION_MAJOR__MASK; in DSI_6G_HW_VERSION_MAJOR()
153 static inline uint32_t DSI_6G_HW_VERSION_MINOR(uint32_t val) in DSI_6G_HW_VERSION_MINOR() argument
155 return ((val) << DSI_6G_HW_VERSION_MINOR__SHIFT) & DSI_6G_HW_VERSION_MINOR__MASK; in DSI_6G_HW_VERSION_MINOR()
159 static inline uint32_t DSI_6G_HW_VERSION_STEP(uint32_t val) in DSI_6G_HW_VERSION_STEP() argument
161 return ((val) << DSI_6G_HW_VERSION_STEP__SHIFT) & DSI_6G_HW_VERSION_STEP__MASK; in DSI_6G_HW_VERSION_STEP()
214 static inline uint32_t DSI_VID_CFG0_VIRT_CHANNEL(uint32_t val) in DSI_VID_CFG0_VIRT_CHANNEL() argument
216 return ((val) << DSI_VID_CFG0_VIRT_CHANNEL__SHIFT) & DSI_VID_CFG0_VIRT_CHANNEL__MASK; in DSI_VID_CFG0_VIRT_CHANNEL()
220 static inline uint32_t DSI_VID_CFG0_DST_FORMAT(enum dsi_vid_dst_format val) in DSI_VID_CFG0_DST_FORMAT() argument
222 return ((val) << DSI_VID_CFG0_DST_FORMAT__SHIFT) & DSI_VID_CFG0_DST_FORMAT__MASK; in DSI_VID_CFG0_DST_FORMAT()
226 static inline uint32_t DSI_VID_CFG0_TRAFFIC_MODE(enum dsi_traffic_mode val) in DSI_VID_CFG0_TRAFFIC_MODE() argument
228 return ((val) << DSI_VID_CFG0_TRAFFIC_MODE__SHIFT) & DSI_VID_CFG0_TRAFFIC_MODE__MASK; in DSI_VID_CFG0_TRAFFIC_MODE()
243 static inline uint32_t DSI_VID_CFG1_RGB_SWAP(enum dsi_rgb_swap val) in DSI_VID_CFG1_RGB_SWAP() argument
245 return ((val) << DSI_VID_CFG1_RGB_SWAP__SHIFT) & DSI_VID_CFG1_RGB_SWAP__MASK; in DSI_VID_CFG1_RGB_SWAP()
251 static inline uint32_t DSI_ACTIVE_H_START(uint32_t val) in DSI_ACTIVE_H_START() argument
253 return ((val) << DSI_ACTIVE_H_START__SHIFT) & DSI_ACTIVE_H_START__MASK; in DSI_ACTIVE_H_START()
257 static inline uint32_t DSI_ACTIVE_H_END(uint32_t val) in DSI_ACTIVE_H_END() argument
259 return ((val) << DSI_ACTIVE_H_END__SHIFT) & DSI_ACTIVE_H_END__MASK; in DSI_ACTIVE_H_END()
265 static inline uint32_t DSI_ACTIVE_V_START(uint32_t val) in DSI_ACTIVE_V_START() argument
267 return ((val) << DSI_ACTIVE_V_START__SHIFT) & DSI_ACTIVE_V_START__MASK; in DSI_ACTIVE_V_START()
271 static inline uint32_t DSI_ACTIVE_V_END(uint32_t val) in DSI_ACTIVE_V_END() argument
273 return ((val) << DSI_ACTIVE_V_END__SHIFT) & DSI_ACTIVE_V_END__MASK; in DSI_ACTIVE_V_END()
279 static inline uint32_t DSI_TOTAL_H_TOTAL(uint32_t val) in DSI_TOTAL_H_TOTAL() argument
281 return ((val) << DSI_TOTAL_H_TOTAL__SHIFT) & DSI_TOTAL_H_TOTAL__MASK; in DSI_TOTAL_H_TOTAL()
285 static inline uint32_t DSI_TOTAL_V_TOTAL(uint32_t val) in DSI_TOTAL_V_TOTAL() argument
287 return ((val) << DSI_TOTAL_V_TOTAL__SHIFT) & DSI_TOTAL_V_TOTAL__MASK; in DSI_TOTAL_V_TOTAL()
293 static inline uint32_t DSI_ACTIVE_HSYNC_START(uint32_t val) in DSI_ACTIVE_HSYNC_START() argument
295 return ((val) << DSI_ACTIVE_HSYNC_START__SHIFT) & DSI_ACTIVE_HSYNC_START__MASK; in DSI_ACTIVE_HSYNC_START()
299 static inline uint32_t DSI_ACTIVE_HSYNC_END(uint32_t val) in DSI_ACTIVE_HSYNC_END() argument
301 return ((val) << DSI_ACTIVE_HSYNC_END__SHIFT) & DSI_ACTIVE_HSYNC_END__MASK; in DSI_ACTIVE_HSYNC_END()
307 static inline uint32_t DSI_ACTIVE_VSYNC_HPOS_START(uint32_t val) in DSI_ACTIVE_VSYNC_HPOS_START() argument
309 return ((val) << DSI_ACTIVE_VSYNC_HPOS_START__SHIFT) & DSI_ACTIVE_VSYNC_HPOS_START__MASK; in DSI_ACTIVE_VSYNC_HPOS_START()
313 static inline uint32_t DSI_ACTIVE_VSYNC_HPOS_END(uint32_t val) in DSI_ACTIVE_VSYNC_HPOS_END() argument
315 return ((val) << DSI_ACTIVE_VSYNC_HPOS_END__SHIFT) & DSI_ACTIVE_VSYNC_HPOS_END__MASK; in DSI_ACTIVE_VSYNC_HPOS_END()
321 static inline uint32_t DSI_ACTIVE_VSYNC_VPOS_START(uint32_t val) in DSI_ACTIVE_VSYNC_VPOS_START() argument
323 return ((val) << DSI_ACTIVE_VSYNC_VPOS_START__SHIFT) & DSI_ACTIVE_VSYNC_VPOS_START__MASK; in DSI_ACTIVE_VSYNC_VPOS_START()
327 static inline uint32_t DSI_ACTIVE_VSYNC_VPOS_END(uint32_t val) in DSI_ACTIVE_VSYNC_VPOS_END() argument
329 return ((val) << DSI_ACTIVE_VSYNC_VPOS_END__SHIFT) & DSI_ACTIVE_VSYNC_VPOS_END__MASK; in DSI_ACTIVE_VSYNC_VPOS_END()
340 static inline uint32_t DSI_CMD_CFG0_DST_FORMAT(enum dsi_cmd_dst_format val) in DSI_CMD_CFG0_DST_FORMAT() argument
342 return ((val) << DSI_CMD_CFG0_DST_FORMAT__SHIFT) & DSI_CMD_CFG0_DST_FORMAT__MASK; in DSI_CMD_CFG0_DST_FORMAT()
349 static inline uint32_t DSI_CMD_CFG0_INTERLEAVE_MAX(uint32_t val) in DSI_CMD_CFG0_INTERLEAVE_MAX() argument
351 return ((val) << DSI_CMD_CFG0_INTERLEAVE_MAX__SHIFT) & DSI_CMD_CFG0_INTERLEAVE_MAX__MASK; in DSI_CMD_CFG0_INTERLEAVE_MAX()
355 static inline uint32_t DSI_CMD_CFG0_RGB_SWAP(enum dsi_rgb_swap val) in DSI_CMD_CFG0_RGB_SWAP() argument
357 return ((val) << DSI_CMD_CFG0_RGB_SWAP__SHIFT) & DSI_CMD_CFG0_RGB_SWAP__MASK; in DSI_CMD_CFG0_RGB_SWAP()
363 static inline uint32_t DSI_CMD_CFG1_WR_MEM_START(uint32_t val) in DSI_CMD_CFG1_WR_MEM_START() argument
365 return ((val) << DSI_CMD_CFG1_WR_MEM_START__SHIFT) & DSI_CMD_CFG1_WR_MEM_START__MASK; in DSI_CMD_CFG1_WR_MEM_START()
369 static inline uint32_t DSI_CMD_CFG1_WR_MEM_CONTINUE(uint32_t val) in DSI_CMD_CFG1_WR_MEM_CONTINUE() argument
371 return ((val) << DSI_CMD_CFG1_WR_MEM_CONTINUE__SHIFT) & DSI_CMD_CFG1_WR_MEM_CONTINUE__MASK; in DSI_CMD_CFG1_WR_MEM_CONTINUE()
382 static inline uint32_t DSI_CMD_MDP_STREAM0_CTRL_DATA_TYPE(uint32_t val) in DSI_CMD_MDP_STREAM0_CTRL_DATA_TYPE() argument
384 …return ((val) << DSI_CMD_MDP_STREAM0_CTRL_DATA_TYPE__SHIFT) & DSI_CMD_MDP_STREAM0_CTRL_DATA_TYPE__… in DSI_CMD_MDP_STREAM0_CTRL_DATA_TYPE()
388 static inline uint32_t DSI_CMD_MDP_STREAM0_CTRL_VIRTUAL_CHANNEL(uint32_t val) in DSI_CMD_MDP_STREAM0_CTRL_VIRTUAL_CHANNEL() argument
390 …return ((val) << DSI_CMD_MDP_STREAM0_CTRL_VIRTUAL_CHANNEL__SHIFT) & DSI_CMD_MDP_STREAM0_CTRL_VIRTU… in DSI_CMD_MDP_STREAM0_CTRL_VIRTUAL_CHANNEL()
394 static inline uint32_t DSI_CMD_MDP_STREAM0_CTRL_WORD_COUNT(uint32_t val) in DSI_CMD_MDP_STREAM0_CTRL_WORD_COUNT() argument
396 …return ((val) << DSI_CMD_MDP_STREAM0_CTRL_WORD_COUNT__SHIFT) & DSI_CMD_MDP_STREAM0_CTRL_WORD_COUNT… in DSI_CMD_MDP_STREAM0_CTRL_WORD_COUNT()
402 static inline uint32_t DSI_CMD_MDP_STREAM0_TOTAL_H_TOTAL(uint32_t val) in DSI_CMD_MDP_STREAM0_TOTAL_H_TOTAL() argument
404 …return ((val) << DSI_CMD_MDP_STREAM0_TOTAL_H_TOTAL__SHIFT) & DSI_CMD_MDP_STREAM0_TOTAL_H_TOTAL__MA… in DSI_CMD_MDP_STREAM0_TOTAL_H_TOTAL()
408 static inline uint32_t DSI_CMD_MDP_STREAM0_TOTAL_V_TOTAL(uint32_t val) in DSI_CMD_MDP_STREAM0_TOTAL_V_TOTAL() argument
410 …return ((val) << DSI_CMD_MDP_STREAM0_TOTAL_V_TOTAL__SHIFT) & DSI_CMD_MDP_STREAM0_TOTAL_V_TOTAL__MA… in DSI_CMD_MDP_STREAM0_TOTAL_V_TOTAL()
416 static inline uint32_t DSI_CMD_MDP_STREAM1_CTRL_DATA_TYPE(uint32_t val) in DSI_CMD_MDP_STREAM1_CTRL_DATA_TYPE() argument
418 …return ((val) << DSI_CMD_MDP_STREAM1_CTRL_DATA_TYPE__SHIFT) & DSI_CMD_MDP_STREAM1_CTRL_DATA_TYPE__… in DSI_CMD_MDP_STREAM1_CTRL_DATA_TYPE()
422 static inline uint32_t DSI_CMD_MDP_STREAM1_CTRL_VIRTUAL_CHANNEL(uint32_t val) in DSI_CMD_MDP_STREAM1_CTRL_VIRTUAL_CHANNEL() argument
424 …return ((val) << DSI_CMD_MDP_STREAM1_CTRL_VIRTUAL_CHANNEL__SHIFT) & DSI_CMD_MDP_STREAM1_CTRL_VIRTU… in DSI_CMD_MDP_STREAM1_CTRL_VIRTUAL_CHANNEL()
428 static inline uint32_t DSI_CMD_MDP_STREAM1_CTRL_WORD_COUNT(uint32_t val) in DSI_CMD_MDP_STREAM1_CTRL_WORD_COUNT() argument
430 …return ((val) << DSI_CMD_MDP_STREAM1_CTRL_WORD_COUNT__SHIFT) & DSI_CMD_MDP_STREAM1_CTRL_WORD_COUNT… in DSI_CMD_MDP_STREAM1_CTRL_WORD_COUNT()
436 static inline uint32_t DSI_CMD_MDP_STREAM1_TOTAL_H_TOTAL(uint32_t val) in DSI_CMD_MDP_STREAM1_TOTAL_H_TOTAL() argument
438 …return ((val) << DSI_CMD_MDP_STREAM1_TOTAL_H_TOTAL__SHIFT) & DSI_CMD_MDP_STREAM1_TOTAL_H_TOTAL__MA… in DSI_CMD_MDP_STREAM1_TOTAL_H_TOTAL()
442 static inline uint32_t DSI_CMD_MDP_STREAM1_TOTAL_V_TOTAL(uint32_t val) in DSI_CMD_MDP_STREAM1_TOTAL_V_TOTAL() argument
444 …return ((val) << DSI_CMD_MDP_STREAM1_TOTAL_V_TOTAL__SHIFT) & DSI_CMD_MDP_STREAM1_TOTAL_V_TOTAL__MA… in DSI_CMD_MDP_STREAM1_TOTAL_V_TOTAL()
456 static inline uint32_t DSI_TRIG_CTRL_DMA_TRIGGER(enum dsi_cmd_trigger val) in DSI_TRIG_CTRL_DMA_TRIGGER() argument
458 return ((val) << DSI_TRIG_CTRL_DMA_TRIGGER__SHIFT) & DSI_TRIG_CTRL_DMA_TRIGGER__MASK; in DSI_TRIG_CTRL_DMA_TRIGGER()
462 static inline uint32_t DSI_TRIG_CTRL_MDP_TRIGGER(enum dsi_cmd_trigger val) in DSI_TRIG_CTRL_MDP_TRIGGER() argument
464 return ((val) << DSI_TRIG_CTRL_MDP_TRIGGER__SHIFT) & DSI_TRIG_CTRL_MDP_TRIGGER__MASK; in DSI_TRIG_CTRL_MDP_TRIGGER()
468 static inline uint32_t DSI_TRIG_CTRL_STREAM(uint32_t val) in DSI_TRIG_CTRL_STREAM() argument
470 return ((val) << DSI_TRIG_CTRL_STREAM__SHIFT) & DSI_TRIG_CTRL_STREAM__MASK; in DSI_TRIG_CTRL_STREAM()
487 static inline uint32_t DSI_LP_TIMER_CTRL_LP_RX_TO(uint32_t val) in DSI_LP_TIMER_CTRL_LP_RX_TO() argument
489 return ((val) << DSI_LP_TIMER_CTRL_LP_RX_TO__SHIFT) & DSI_LP_TIMER_CTRL_LP_RX_TO__MASK; in DSI_LP_TIMER_CTRL_LP_RX_TO()
493 static inline uint32_t DSI_LP_TIMER_CTRL_BTA_TO(uint32_t val) in DSI_LP_TIMER_CTRL_BTA_TO() argument
495 return ((val) << DSI_LP_TIMER_CTRL_BTA_TO__SHIFT) & DSI_LP_TIMER_CTRL_BTA_TO__MASK; in DSI_LP_TIMER_CTRL_BTA_TO()
501 static inline uint32_t DSI_HS_TIMER_CTRL_HS_TX_TO(uint32_t val) in DSI_HS_TIMER_CTRL_HS_TX_TO() argument
503 return ((val) << DSI_HS_TIMER_CTRL_HS_TX_TO__SHIFT) & DSI_HS_TIMER_CTRL_HS_TX_TO__MASK; in DSI_HS_TIMER_CTRL_HS_TX_TO()
507 static inline uint32_t DSI_HS_TIMER_CTRL_TIMER_RESOLUTION(uint32_t val) in DSI_HS_TIMER_CTRL_TIMER_RESOLUTION() argument
509 …return ((val) << DSI_HS_TIMER_CTRL_TIMER_RESOLUTION__SHIFT) & DSI_HS_TIMER_CTRL_TIMER_RESOLUTION__… in DSI_HS_TIMER_CTRL_TIMER_RESOLUTION()
518 static inline uint32_t DSI_CLKOUT_TIMING_CTRL_T_CLK_PRE(uint32_t val) in DSI_CLKOUT_TIMING_CTRL_T_CLK_PRE() argument
520 return ((val) << DSI_CLKOUT_TIMING_CTRL_T_CLK_PRE__SHIFT) & DSI_CLKOUT_TIMING_CTRL_T_CLK_PRE__MASK; in DSI_CLKOUT_TIMING_CTRL_T_CLK_PRE()
524 static inline uint32_t DSI_CLKOUT_TIMING_CTRL_T_CLK_POST(uint32_t val) in DSI_CLKOUT_TIMING_CTRL_T_CLK_POST() argument
526 …return ((val) << DSI_CLKOUT_TIMING_CTRL_T_CLK_POST__SHIFT) & DSI_CLKOUT_TIMING_CTRL_T_CLK_POST__MA… in DSI_CLKOUT_TIMING_CTRL_T_CLK_POST()
553 static inline uint32_t DSI_LANE_SWAP_CTRL_DLN_SWAP_SEL(enum dsi_lane_swap val) in DSI_LANE_SWAP_CTRL_DLN_SWAP_SEL() argument
555 return ((val) << DSI_LANE_SWAP_CTRL_DLN_SWAP_SEL__SHIFT) & DSI_LANE_SWAP_CTRL_DLN_SWAP_SEL__MASK; in DSI_LANE_SWAP_CTRL_DLN_SWAP_SEL()
602 static inline uint32_t DSI_TPG_VIDEO_CONFIG_BPP(enum video_config_bpp val) in DSI_TPG_VIDEO_CONFIG_BPP() argument
604 return ((val) << DSI_TPG_VIDEO_CONFIG_BPP__SHIFT) & DSI_TPG_VIDEO_CONFIG_BPP__MASK; in DSI_TPG_VIDEO_CONFIG_BPP()
611 static inline uint32_t DSI_TEST_PATTERN_GEN_CTRL_CMD_DMA_PATTERN_SEL(enum cmd_dma_pattern_sel val) in DSI_TEST_PATTERN_GEN_CTRL_CMD_DMA_PATTERN_SEL() argument
613 …return ((val) << DSI_TEST_PATTERN_GEN_CTRL_CMD_DMA_PATTERN_SEL__SHIFT) & DSI_TEST_PATTERN_GEN_CTRL… in DSI_TEST_PATTERN_GEN_CTRL_CMD_DMA_PATTERN_SEL()
617 …int32_t DSI_TEST_PATTERN_GEN_CTRL_CMD_MDP_STREAM0_PATTERN_SEL(enum cmd_mdp_stream0_pattern_sel val) in DSI_TEST_PATTERN_GEN_CTRL_CMD_MDP_STREAM0_PATTERN_SEL() argument
619 …return ((val) << DSI_TEST_PATTERN_GEN_CTRL_CMD_MDP_STREAM0_PATTERN_SEL__SHIFT) & DSI_TEST_PATTERN_… in DSI_TEST_PATTERN_GEN_CTRL_CMD_MDP_STREAM0_PATTERN_SEL()
623 static inline uint32_t DSI_TEST_PATTERN_GEN_CTRL_VIDEO_PATTERN_SEL(enum video_pattern_sel val) in DSI_TEST_PATTERN_GEN_CTRL_VIDEO_PATTERN_SEL() argument
625 …return ((val) << DSI_TEST_PATTERN_GEN_CTRL_VIDEO_PATTERN_SEL__SHIFT) & DSI_TEST_PATTERN_GEN_CTRL_V… in DSI_TEST_PATTERN_GEN_CTRL_VIDEO_PATTERN_SEL()
647 static inline uint32_t DSI_CMD_MODE_MDP_CTRL2_DST_FORMAT2(enum dsi_cmd_dst_format val) in DSI_CMD_MODE_MDP_CTRL2_DST_FORMAT2() argument
649 …return ((val) << DSI_CMD_MODE_MDP_CTRL2_DST_FORMAT2__SHIFT) & DSI_CMD_MODE_MDP_CTRL2_DST_FORMAT2__… in DSI_CMD_MODE_MDP_CTRL2_DST_FORMAT2()
657 static inline uint32_t DSI_CMD_MODE_MDP_CTRL2_RGB_SWAP(enum dsi_rgb_swap val) in DSI_CMD_MODE_MDP_CTRL2_RGB_SWAP() argument
659 return ((val) << DSI_CMD_MODE_MDP_CTRL2_RGB_SWAP__SHIFT) & DSI_CMD_MODE_MDP_CTRL2_RGB_SWAP__MASK; in DSI_CMD_MODE_MDP_CTRL2_RGB_SWAP()
663 static inline uint32_t DSI_CMD_MODE_MDP_CTRL2_INPUT_RGB_SWAP(enum dsi_rgb_swap val) in DSI_CMD_MODE_MDP_CTRL2_INPUT_RGB_SWAP() argument
665 …return ((val) << DSI_CMD_MODE_MDP_CTRL2_INPUT_RGB_SWAP__SHIFT) & DSI_CMD_MODE_MDP_CTRL2_INPUT_RGB_… in DSI_CMD_MODE_MDP_CTRL2_INPUT_RGB_SWAP()
672 static inline uint32_t DSI_CMD_MODE_MDP_STREAM2_CTRL_DATA_TYPE(uint32_t val) in DSI_CMD_MODE_MDP_STREAM2_CTRL_DATA_TYPE() argument
674 …return ((val) << DSI_CMD_MODE_MDP_STREAM2_CTRL_DATA_TYPE__SHIFT) & DSI_CMD_MODE_MDP_STREAM2_CTRL_D… in DSI_CMD_MODE_MDP_STREAM2_CTRL_DATA_TYPE()
678 static inline uint32_t DSI_CMD_MODE_MDP_STREAM2_CTRL_VIRTUAL_CHANNEL(uint32_t val) in DSI_CMD_MODE_MDP_STREAM2_CTRL_VIRTUAL_CHANNEL() argument
680 …return ((val) << DSI_CMD_MODE_MDP_STREAM2_CTRL_VIRTUAL_CHANNEL__SHIFT) & DSI_CMD_MODE_MDP_STREAM2_… in DSI_CMD_MODE_MDP_STREAM2_CTRL_VIRTUAL_CHANNEL()
684 static inline uint32_t DSI_CMD_MODE_MDP_STREAM2_CTRL_WORD_COUNT(uint32_t val) in DSI_CMD_MODE_MDP_STREAM2_CTRL_WORD_COUNT() argument
686 …return ((val) << DSI_CMD_MODE_MDP_STREAM2_CTRL_WORD_COUNT__SHIFT) & DSI_CMD_MODE_MDP_STREAM2_CTRL_… in DSI_CMD_MODE_MDP_STREAM2_CTRL_WORD_COUNT()
692 static inline uint32_t DSI_RDBK_DATA_CTRL_COUNT(uint32_t val) in DSI_RDBK_DATA_CTRL_COUNT() argument
694 return ((val) << DSI_RDBK_DATA_CTRL_COUNT__SHIFT) & DSI_RDBK_DATA_CTRL_COUNT__MASK; in DSI_RDBK_DATA_CTRL_COUNT()
701 static inline uint32_t DSI_VERSION_MAJOR(uint32_t val) in DSI_VERSION_MAJOR() argument
703 return ((val) << DSI_VERSION_MAJOR__SHIFT) & DSI_VERSION_MAJOR__MASK; in DSI_VERSION_MAJOR()