Lines Matching refs:mxsfb
40 static u32 set_hsync_pulse_width(struct mxsfb_drm_private *mxsfb, u32 val) in set_hsync_pulse_width() argument
42 return (val & mxsfb->devdata->hs_wdth_mask) << in set_hsync_pulse_width()
43 mxsfb->devdata->hs_wdth_shift; in set_hsync_pulse_width()
50 static void mxsfb_set_formats(struct mxsfb_drm_private *mxsfb, in mxsfb_set_formats() argument
53 struct drm_device *drm = mxsfb->drm; in mxsfb_set_formats()
54 const u32 format = mxsfb->crtc.primary->state->fb->format->format; in mxsfb_set_formats()
63 ctrl1 = readl(mxsfb->base + LCDC_CTRL1); in mxsfb_set_formats()
95 writel(ctrl1, mxsfb->base + LCDC_CTRL1); in mxsfb_set_formats()
96 writel(ctrl, mxsfb->base + LCDC_CTRL); in mxsfb_set_formats()
99 static void mxsfb_enable_controller(struct mxsfb_drm_private *mxsfb) in mxsfb_enable_controller() argument
103 if (mxsfb->clk_disp_axi) in mxsfb_enable_controller()
104 clk_prepare_enable(mxsfb->clk_disp_axi); in mxsfb_enable_controller()
105 clk_prepare_enable(mxsfb->clk); in mxsfb_enable_controller()
108 if (mxsfb->devdata->has_ctrl2) { in mxsfb_enable_controller()
109 reg = readl(mxsfb->base + LCDC_V4_CTRL2); in mxsfb_enable_controller()
112 writel(reg, mxsfb->base + LCDC_V4_CTRL2); in mxsfb_enable_controller()
116 writel(CTRL_DOTCLK_MODE, mxsfb->base + LCDC_CTRL + REG_SET); in mxsfb_enable_controller()
119 reg = readl(mxsfb->base + LCDC_VDCTRL4); in mxsfb_enable_controller()
121 writel(reg, mxsfb->base + LCDC_VDCTRL4); in mxsfb_enable_controller()
148 reg = readl(mxsfb->base + LCDC_CTRL1); in mxsfb_enable_controller()
150 writel(reg, mxsfb->base + LCDC_CTRL1); in mxsfb_enable_controller()
152 writel(CTRL_RUN, mxsfb->base + LCDC_CTRL + REG_SET); in mxsfb_enable_controller()
155 static void mxsfb_disable_controller(struct mxsfb_drm_private *mxsfb) in mxsfb_disable_controller() argument
163 writel(CTRL_DOTCLK_MODE, mxsfb->base + LCDC_CTRL + REG_CLR); in mxsfb_disable_controller()
165 readl_poll_timeout(mxsfb->base + LCDC_CTRL, reg, !(reg & CTRL_RUN), in mxsfb_disable_controller()
168 reg = readl(mxsfb->base + LCDC_VDCTRL4); in mxsfb_disable_controller()
170 writel(reg, mxsfb->base + LCDC_VDCTRL4); in mxsfb_disable_controller()
172 clk_disable_unprepare(mxsfb->clk); in mxsfb_disable_controller()
173 if (mxsfb->clk_disp_axi) in mxsfb_disable_controller()
174 clk_disable_unprepare(mxsfb->clk_disp_axi); in mxsfb_disable_controller()
190 static int mxsfb_reset_block(struct mxsfb_drm_private *mxsfb) in mxsfb_reset_block() argument
194 ret = clear_poll_bit(mxsfb->base + LCDC_CTRL, CTRL_SFTRST); in mxsfb_reset_block()
198 writel(CTRL_CLKGATE, mxsfb->base + LCDC_CTRL + REG_CLR); in mxsfb_reset_block()
200 ret = clear_poll_bit(mxsfb->base + LCDC_CTRL, CTRL_SFTRST); in mxsfb_reset_block()
204 return clear_poll_bit(mxsfb->base + LCDC_CTRL, CTRL_CLKGATE); in mxsfb_reset_block()
222 static void mxsfb_crtc_mode_set_nofb(struct mxsfb_drm_private *mxsfb, in mxsfb_crtc_mode_set_nofb() argument
225 struct drm_device *drm = mxsfb->crtc.dev; in mxsfb_crtc_mode_set_nofb()
226 struct drm_display_mode *m = &mxsfb->crtc.state->adjusted_mode; in mxsfb_crtc_mode_set_nofb()
227 u32 bus_flags = mxsfb->connector->display_info.bus_flags; in mxsfb_crtc_mode_set_nofb()
238 err = mxsfb_reset_block(mxsfb); in mxsfb_crtc_mode_set_nofb()
243 writel(CTRL1_FIFO_CLEAR, mxsfb->base + LCDC_CTRL1 + REG_SET); in mxsfb_crtc_mode_set_nofb()
244 readl(mxsfb->base + LCDC_CTRL1); in mxsfb_crtc_mode_set_nofb()
245 writel(CTRL1_FIFO_CLEAR, mxsfb->base + LCDC_CTRL1 + REG_CLR); in mxsfb_crtc_mode_set_nofb()
246 readl(mxsfb->base + LCDC_CTRL1); in mxsfb_crtc_mode_set_nofb()
248 if (mxsfb->devdata->has_overlay) in mxsfb_crtc_mode_set_nofb()
249 writel(0, mxsfb->base + LCDC_AS_CTRL); in mxsfb_crtc_mode_set_nofb()
251 mxsfb_set_formats(mxsfb, bus_format); in mxsfb_crtc_mode_set_nofb()
253 clk_set_rate(mxsfb->clk, m->crtc_clock * 1000); in mxsfb_crtc_mode_set_nofb()
255 if (mxsfb->bridge && mxsfb->bridge->timings) in mxsfb_crtc_mode_set_nofb()
256 bus_flags = mxsfb->bridge->timings->input_bus_flags; in mxsfb_crtc_mode_set_nofb()
260 (int)(clk_get_rate(mxsfb->clk) / 1000)); in mxsfb_crtc_mode_set_nofb()
267 mxsfb->base + mxsfb->devdata->transfer_count); in mxsfb_crtc_mode_set_nofb()
291 writel(vdctrl0, mxsfb->base + LCDC_VDCTRL0); in mxsfb_crtc_mode_set_nofb()
294 writel(m->crtc_vtotal, mxsfb->base + LCDC_VDCTRL1); in mxsfb_crtc_mode_set_nofb()
298 writel(set_hsync_pulse_width(mxsfb, hsync_pulse_len) | in mxsfb_crtc_mode_set_nofb()
300 mxsfb->base + LCDC_VDCTRL2); in mxsfb_crtc_mode_set_nofb()
304 mxsfb->base + LCDC_VDCTRL3); in mxsfb_crtc_mode_set_nofb()
307 mxsfb->base + LCDC_VDCTRL4); in mxsfb_crtc_mode_set_nofb()
348 struct mxsfb_drm_private *mxsfb = to_mxsfb_drm_private(crtc->dev); in mxsfb_crtc_atomic_enable() local
350 struct drm_device *drm = mxsfb->drm; in mxsfb_crtc_atomic_enable()
355 mxsfb_enable_axi_clk(mxsfb); in mxsfb_crtc_atomic_enable()
360 if (mxsfb->bridge) { in mxsfb_crtc_atomic_enable()
363 mxsfb->bridge); in mxsfb_crtc_atomic_enable()
374 if (!bus_format && mxsfb->connector->display_info.num_bus_formats) in mxsfb_crtc_atomic_enable()
375 bus_format = mxsfb->connector->display_info.bus_formats[0]; in mxsfb_crtc_atomic_enable()
381 mxsfb_crtc_mode_set_nofb(mxsfb, bus_format); in mxsfb_crtc_atomic_enable()
386 writel(paddr, mxsfb->base + mxsfb->devdata->cur_buf); in mxsfb_crtc_atomic_enable()
387 writel(paddr, mxsfb->base + mxsfb->devdata->next_buf); in mxsfb_crtc_atomic_enable()
390 mxsfb_enable_controller(mxsfb); in mxsfb_crtc_atomic_enable()
396 struct mxsfb_drm_private *mxsfb = to_mxsfb_drm_private(crtc->dev); in mxsfb_crtc_atomic_disable() local
397 struct drm_device *drm = mxsfb->drm; in mxsfb_crtc_atomic_disable()
400 mxsfb_disable_controller(mxsfb); in mxsfb_crtc_atomic_disable()
412 mxsfb_disable_axi_clk(mxsfb); in mxsfb_crtc_atomic_disable()
418 struct mxsfb_drm_private *mxsfb = to_mxsfb_drm_private(crtc->dev); in mxsfb_crtc_enable_vblank() local
421 writel(CTRL1_CUR_FRAME_DONE_IRQ, mxsfb->base + LCDC_CTRL1 + REG_CLR); in mxsfb_crtc_enable_vblank()
422 writel(CTRL1_CUR_FRAME_DONE_IRQ_EN, mxsfb->base + LCDC_CTRL1 + REG_SET); in mxsfb_crtc_enable_vblank()
429 struct mxsfb_drm_private *mxsfb = to_mxsfb_drm_private(crtc->dev); in mxsfb_crtc_disable_vblank() local
432 writel(CTRL1_CUR_FRAME_DONE_IRQ_EN, mxsfb->base + LCDC_CTRL1 + REG_CLR); in mxsfb_crtc_disable_vblank()
433 writel(CTRL1_CUR_FRAME_DONE_IRQ, mxsfb->base + LCDC_CTRL1 + REG_CLR); in mxsfb_crtc_disable_vblank()
471 struct mxsfb_drm_private *mxsfb = to_mxsfb_drm_private(plane->dev); in mxsfb_plane_atomic_check() local
475 &mxsfb->crtc); in mxsfb_plane_atomic_check()
486 struct mxsfb_drm_private *mxsfb = to_mxsfb_drm_private(plane->dev); in mxsfb_plane_primary_atomic_update() local
491 writel(paddr, mxsfb->base + mxsfb->devdata->next_buf); in mxsfb_plane_primary_atomic_update()
499 struct mxsfb_drm_private *mxsfb = to_mxsfb_drm_private(plane->dev); in mxsfb_plane_overlay_atomic_update() local
507 writel(0, mxsfb->base + LCDC_AS_CTRL); in mxsfb_plane_overlay_atomic_update()
519 writel(paddr, mxsfb->base + LCDC_AS_NEXT_BUF); in mxsfb_plane_overlay_atomic_update()
526 writel(paddr, mxsfb->base + LCDC_AS_BUF); in mxsfb_plane_overlay_atomic_update()
554 writel(ctrl, mxsfb->base + LCDC_AS_CTRL); in mxsfb_plane_overlay_atomic_update()
608 int mxsfb_kms_init(struct mxsfb_drm_private *mxsfb) in mxsfb_kms_init() argument
610 struct drm_encoder *encoder = &mxsfb->encoder; in mxsfb_kms_init()
611 struct drm_crtc *crtc = &mxsfb->crtc; in mxsfb_kms_init()
614 drm_plane_helper_add(&mxsfb->planes.primary, in mxsfb_kms_init()
616 ret = drm_universal_plane_init(mxsfb->drm, &mxsfb->planes.primary, 1, in mxsfb_kms_init()
625 if (mxsfb->devdata->has_overlay) { in mxsfb_kms_init()
626 drm_plane_helper_add(&mxsfb->planes.overlay, in mxsfb_kms_init()
628 ret = drm_universal_plane_init(mxsfb->drm, in mxsfb_kms_init()
629 &mxsfb->planes.overlay, 1, in mxsfb_kms_init()
640 ret = drm_crtc_init_with_planes(mxsfb->drm, crtc, in mxsfb_kms_init()
641 &mxsfb->planes.primary, NULL, in mxsfb_kms_init()
647 return drm_encoder_init(mxsfb->drm, encoder, &mxsfb_encoder_funcs, in mxsfb_kms_init()