Lines Matching refs:tiling_flags
1154 uint32_t fb_format, fb_pitch_pixels, tiling_flags; in dce4_crtc_do_set_base() local
1191 radeon_bo_get_tiling_flags(rbo, &tiling_flags, NULL); in dce4_crtc_do_set_base()
1274 if (tiling_flags & RADEON_TILING_MACRO) { in dce4_crtc_do_set_base()
1275 evergreen_tiling_fields(tiling_flags, &bankw, &bankh, &mtaspect, &tile_split); in dce4_crtc_do_set_base()
1348 } else if (tiling_flags & RADEON_TILING_MICRO) in dce4_crtc_do_set_base()
1475 uint32_t fb_format, fb_pitch_pixels, tiling_flags; in avivo_crtc_do_set_base() local
1510 radeon_bo_get_tiling_flags(rbo, &tiling_flags, NULL); in avivo_crtc_do_set_base()
1586 if (tiling_flags & RADEON_TILING_MACRO) in avivo_crtc_do_set_base()
1588 else if (tiling_flags & RADEON_TILING_MICRO) in avivo_crtc_do_set_base()
1591 if (tiling_flags & RADEON_TILING_MACRO) in avivo_crtc_do_set_base()
1594 if (tiling_flags & RADEON_TILING_MICRO) in avivo_crtc_do_set_base()