Lines Matching refs:REG
55 #define REG(r) (dispc_common_regmap[r ## _OFF]) macro
57 #define DSS_REVISION REG(DSS_REVISION)
58 #define DSS_SYSCONFIG REG(DSS_SYSCONFIG)
59 #define DSS_SYSSTATUS REG(DSS_SYSSTATUS)
60 #define DISPC_IRQ_EOI REG(DISPC_IRQ_EOI)
61 #define DISPC_IRQSTATUS_RAW REG(DISPC_IRQSTATUS_RAW)
62 #define DISPC_IRQSTATUS REG(DISPC_IRQSTATUS)
63 #define DISPC_IRQENABLE_SET REG(DISPC_IRQENABLE_SET)
64 #define DISPC_IRQENABLE_CLR REG(DISPC_IRQENABLE_CLR)
65 #define DISPC_VID_IRQENABLE(n) (REG(DISPC_VID_IRQENABLE) + (n) * 4)
66 #define DISPC_VID_IRQSTATUS(n) (REG(DISPC_VID_IRQSTATUS) + (n) * 4)
67 #define DISPC_VP_IRQENABLE(n) (REG(DISPC_VP_IRQENABLE) + (n) * 4)
68 #define DISPC_VP_IRQSTATUS(n) (REG(DISPC_VP_IRQSTATUS) + (n) * 4)
69 #define WB_IRQENABLE REG(WB_IRQENABLE)
70 #define WB_IRQSTATUS REG(WB_IRQSTATUS)
72 #define DISPC_GLOBAL_MFLAG_ATTRIBUTE REG(DISPC_GLOBAL_MFLAG_ATTRIBUTE)
73 #define DISPC_GLOBAL_OUTPUT_ENABLE REG(DISPC_GLOBAL_OUTPUT_ENABLE)
74 #define DISPC_GLOBAL_BUFFER REG(DISPC_GLOBAL_BUFFER)
75 #define DSS_CBA_CFG REG(DSS_CBA_CFG)
76 #define DISPC_DBG_CONTROL REG(DISPC_DBG_CONTROL)
77 #define DISPC_DBG_STATUS REG(DISPC_DBG_STATUS)
78 #define DISPC_CLKGATING_DISABLE REG(DISPC_CLKGATING_DISABLE)
79 #define DISPC_SECURE_DISABLE REG(DISPC_SECURE_DISABLE)
81 #define FBDC_REVISION_1 REG(FBDC_REVISION_1)
82 #define FBDC_REVISION_2 REG(FBDC_REVISION_2)
83 #define FBDC_REVISION_3 REG(FBDC_REVISION_3)
84 #define FBDC_REVISION_4 REG(FBDC_REVISION_4)
85 #define FBDC_REVISION_5 REG(FBDC_REVISION_5)
86 #define FBDC_REVISION_6 REG(FBDC_REVISION_6)
87 #define FBDC_COMMON_CONTROL REG(FBDC_COMMON_CONTROL)
88 #define FBDC_CONSTANT_COLOR_0 REG(FBDC_CONSTANT_COLOR_0)
89 #define FBDC_CONSTANT_COLOR_1 REG(FBDC_CONSTANT_COLOR_1)
90 #define DISPC_CONNECTIONS REG(DISPC_CONNECTIONS)
91 #define DISPC_MSS_VP1 REG(DISPC_MSS_VP1)
92 #define DISPC_MSS_VP3 REG(DISPC_MSS_VP3)