Lines Matching refs:DRM_DEBUG
203 DRM_DEBUG("direct TMU read used small immediate\n"); in check_tmu_write()
212 DRM_DEBUG("direct TMU load wasn't an add\n"); in check_tmu_write()
223 DRM_DEBUG("direct TMU load wasn't clamped\n"); in check_tmu_write()
229 DRM_DEBUG("direct TMU load wasn't clamped\n"); in check_tmu_write()
241 DRM_DEBUG("direct TMU load didn't add to a uniform\n"); in check_tmu_write()
249 DRM_DEBUG("uniform read in the same instruction as " in check_tmu_write()
256 DRM_DEBUG("TMU%d got too many parameters before dispatch\n", in check_tmu_write()
268 DRM_DEBUG("Texturing with undefined uniform address\n"); in check_tmu_write()
339 DRM_DEBUG("uniforms address change must be " in validate_uniform_address_write()
345 DRM_DEBUG("Uniform address reset must be an ADD.\n"); in validate_uniform_address_write()
350 DRM_DEBUG("Uniform address reset must be unconditional.\n"); in validate_uniform_address_write()
356 DRM_DEBUG("No packing allowed on uniforms reset\n"); in validate_uniform_address_write()
361 DRM_DEBUG("First argument of uniform address write must be " in validate_uniform_address_write()
367 DRM_DEBUG("Resetting uniforms with offset %db instead of %db\n", in validate_uniform_address_write()
375 DRM_DEBUG("Second argument of uniform address write must be " in validate_uniform_address_write()
420 DRM_DEBUG("relative uniforms address change " in check_reg_write()
455 DRM_DEBUG("Unsupported waddr %d\n", waddr); in check_reg_write()
459 DRM_DEBUG("General VPM DMA unsupported\n"); in check_reg_write()
562 DRM_DEBUG("ADD and MUL both set up textures\n"); in check_instruction_writes()
591 DRM_DEBUG("branch instruction at %d wrote a register.\n", in check_branch()
617 DRM_DEBUG("Uniform read with undefined uniform " in check_instruction_reads()
663 DRM_DEBUG("Branch at %d during delay slots\n", ip); in vc4_validate_branches()
669 DRM_DEBUG("branching from register relative " in vc4_validate_branches()
675 DRM_DEBUG("relative branching required\n"); in vc4_validate_branches()
685 DRM_DEBUG("branch target not aligned\n"); in vc4_validate_branches()
691 DRM_DEBUG("Branch at %d outside of shader (ip %d/%d)\n", in vc4_validate_branches()
702 DRM_DEBUG("Branch at %d continues past shader end " in vc4_validate_branches()
712 DRM_DEBUG("Branch landed after QPU_SIG_PROG_END"); in vc4_validate_branches()
753 DRM_DEBUG("Branch target landed during TMU setup\n"); in vc4_handle_branch_target()
840 DRM_DEBUG("Bad write at ip %d\n", ip); in vc4_validate_shader()
858 DRM_DEBUG("Thread switch too soon after " in vc4_validate_shader()
870 DRM_DEBUG("Bad LOAD_IMM write at ip %d\n", ip); in vc4_validate_shader()
881 DRM_DEBUG("Branch in thread switch at ip %d", in vc4_validate_shader()
888 DRM_DEBUG("Unsupported QPU signal %d at " in vc4_validate_shader()
901 DRM_DEBUG("shader failed to terminate before " in vc4_validate_shader()
910 DRM_DEBUG("Shader uses threading, but uses the upper " in vc4_validate_shader()