Lines Matching refs:int_status
634 u32 int_status, u32 line_status) in img_i2c_raw_atomic_delay_handler() argument
642 static unsigned int img_i2c_raw(struct img_i2c *i2c, u32 int_status, in img_i2c_raw() argument
645 if (int_status & INT_TIMING) { in img_i2c_raw()
648 int_status, line_status); in img_i2c_raw()
654 static unsigned int img_i2c_sequence(struct img_i2c *i2c, u32 int_status) in img_i2c_sequence() argument
666 if (int_status & INT_SLAVE_EVENT) in img_i2c_sequence()
668 if (int_status & INT_TRANSACTION_DONE) in img_i2c_sequence()
733 u32 int_status, in img_i2c_atomic() argument
739 if (int_status & INT_SLAVE_EVENT) in img_i2c_atomic()
741 if (int_status & INT_TRANSACTION_DONE) in img_i2c_atomic()
854 unsigned int int_status, in img_i2c_auto() argument
857 if (int_status & (INT_WRITE_ACK_ERR | INT_ADDR_ACK_ERR)) in img_i2c_auto()
864 (int_status & INT_FIFO_FULL_FILLING)) in img_i2c_auto()
881 if (int_status & INT_STOP_DETECTED) { in img_i2c_auto()
889 if (int_status & (INT_FIFO_FULL_FILLING | INT_MASTER_HALTED)) { in img_i2c_auto()
895 if (int_status & (INT_FIFO_EMPTY | INT_MASTER_HALTED)) { in img_i2c_auto()
896 if ((int_status & INT_FIFO_EMPTY) && in img_i2c_auto()
902 if (int_status & INT_MASTER_HALTED) { in img_i2c_auto()
917 u32 int_status, line_status; in img_i2c_isr() local
922 int_status = img_i2c_readl(i2c, SCB_INT_STATUS_REG); in img_i2c_isr()
924 img_i2c_writel(i2c, SCB_INT_CLEAR_REG, int_status); in img_i2c_isr()
948 if ((int_status & INT_SCLK_LOW_TIMEOUT) && in img_i2c_isr()
949 !(int_status & (INT_SLAVE_EVENT | in img_i2c_isr()
961 hret = img_i2c_atomic(i2c, int_status, line_status); in img_i2c_isr()
963 hret = img_i2c_auto(i2c, int_status, line_status); in img_i2c_isr()
965 hret = img_i2c_sequence(i2c, int_status); in img_i2c_isr()
966 else if (i2c->mode == MODE_WAITSTOP && (int_status & INT_SLAVE_EVENT) && in img_i2c_isr()
970 hret = img_i2c_raw(i2c, int_status, line_status); in img_i2c_isr()
975 img_i2c_writel(i2c, SCB_INT_CLEAR_REG, int_status & INT_LEVEL); in img_i2c_isr()