Lines Matching refs:adc
528 static u32 stm32_adc_readl(struct stm32_adc *adc, u32 reg) in stm32_adc_readl() argument
530 return readl_relaxed(adc->common->base + adc->offset + reg); in stm32_adc_readl()
533 #define stm32_adc_readl_addr(addr) stm32_adc_readl(adc, addr)
539 static u16 stm32_adc_readw(struct stm32_adc *adc, u32 reg) in stm32_adc_readw() argument
541 return readw_relaxed(adc->common->base + adc->offset + reg); in stm32_adc_readw()
544 static void stm32_adc_writel(struct stm32_adc *adc, u32 reg, u32 val) in stm32_adc_writel() argument
546 writel_relaxed(val, adc->common->base + adc->offset + reg); in stm32_adc_writel()
549 static void stm32_adc_set_bits(struct stm32_adc *adc, u32 reg, u32 bits) in stm32_adc_set_bits() argument
553 spin_lock_irqsave(&adc->lock, flags); in stm32_adc_set_bits()
554 stm32_adc_writel(adc, reg, stm32_adc_readl(adc, reg) | bits); in stm32_adc_set_bits()
555 spin_unlock_irqrestore(&adc->lock, flags); in stm32_adc_set_bits()
558 static void stm32_adc_set_bits_common(struct stm32_adc *adc, u32 reg, u32 bits) in stm32_adc_set_bits_common() argument
560 spin_lock(&adc->common->lock); in stm32_adc_set_bits_common()
561 writel_relaxed(readl_relaxed(adc->common->base + reg) | bits, in stm32_adc_set_bits_common()
562 adc->common->base + reg); in stm32_adc_set_bits_common()
563 spin_unlock(&adc->common->lock); in stm32_adc_set_bits_common()
566 static void stm32_adc_clr_bits(struct stm32_adc *adc, u32 reg, u32 bits) in stm32_adc_clr_bits() argument
570 spin_lock_irqsave(&adc->lock, flags); in stm32_adc_clr_bits()
571 stm32_adc_writel(adc, reg, stm32_adc_readl(adc, reg) & ~bits); in stm32_adc_clr_bits()
572 spin_unlock_irqrestore(&adc->lock, flags); in stm32_adc_clr_bits()
575 static void stm32_adc_clr_bits_common(struct stm32_adc *adc, u32 reg, u32 bits) in stm32_adc_clr_bits_common() argument
577 spin_lock(&adc->common->lock); in stm32_adc_clr_bits_common()
578 writel_relaxed(readl_relaxed(adc->common->base + reg) & ~bits, in stm32_adc_clr_bits_common()
579 adc->common->base + reg); in stm32_adc_clr_bits_common()
580 spin_unlock(&adc->common->lock); in stm32_adc_clr_bits_common()
587 static void stm32_adc_conv_irq_enable(struct stm32_adc *adc) in stm32_adc_conv_irq_enable() argument
589 stm32_adc_set_bits(adc, adc->cfg->regs->ier_eoc.reg, in stm32_adc_conv_irq_enable()
590 adc->cfg->regs->ier_eoc.mask); in stm32_adc_conv_irq_enable()
597 static void stm32_adc_conv_irq_disable(struct stm32_adc *adc) in stm32_adc_conv_irq_disable() argument
599 stm32_adc_clr_bits(adc, adc->cfg->regs->ier_eoc.reg, in stm32_adc_conv_irq_disable()
600 adc->cfg->regs->ier_eoc.mask); in stm32_adc_conv_irq_disable()
603 static void stm32_adc_ovr_irq_enable(struct stm32_adc *adc) in stm32_adc_ovr_irq_enable() argument
605 stm32_adc_set_bits(adc, adc->cfg->regs->ier_ovr.reg, in stm32_adc_ovr_irq_enable()
606 adc->cfg->regs->ier_ovr.mask); in stm32_adc_ovr_irq_enable()
609 static void stm32_adc_ovr_irq_disable(struct stm32_adc *adc) in stm32_adc_ovr_irq_disable() argument
611 stm32_adc_clr_bits(adc, adc->cfg->regs->ier_ovr.reg, in stm32_adc_ovr_irq_disable()
612 adc->cfg->regs->ier_ovr.mask); in stm32_adc_ovr_irq_disable()
615 static void stm32_adc_set_res(struct stm32_adc *adc) in stm32_adc_set_res() argument
617 const struct stm32_adc_regs *res = &adc->cfg->regs->res; in stm32_adc_set_res()
620 val = stm32_adc_readl(adc, res->reg); in stm32_adc_set_res()
621 val = (val & ~res->mask) | (adc->res << res->shift); in stm32_adc_set_res()
622 stm32_adc_writel(adc, res->reg, val); in stm32_adc_set_res()
628 struct stm32_adc *adc = iio_priv(indio_dev); in stm32_adc_hw_stop() local
630 if (adc->cfg->unprepare) in stm32_adc_hw_stop()
631 adc->cfg->unprepare(indio_dev); in stm32_adc_hw_stop()
633 clk_disable_unprepare(adc->clk); in stm32_adc_hw_stop()
641 struct stm32_adc *adc = iio_priv(indio_dev); in stm32_adc_hw_start() local
644 ret = clk_prepare_enable(adc->clk); in stm32_adc_hw_start()
648 stm32_adc_set_res(adc); in stm32_adc_hw_start()
650 if (adc->cfg->prepare) { in stm32_adc_hw_start()
651 ret = adc->cfg->prepare(indio_dev); in stm32_adc_hw_start()
659 clk_disable_unprepare(adc->clk); in stm32_adc_hw_start()
666 struct stm32_adc *adc = iio_priv(indio_dev); in stm32_adc_int_ch_enable() local
670 if (adc->int_ch[i] == STM32_ADC_INT_CH_NONE) in stm32_adc_int_ch_enable()
676 stm32_adc_set_bits(adc, adc->cfg->regs->or_vdd.reg, in stm32_adc_int_ch_enable()
677 adc->cfg->regs->or_vdd.mask); in stm32_adc_int_ch_enable()
681 stm32_adc_set_bits_common(adc, adc->cfg->regs->ccr_vref.reg, in stm32_adc_int_ch_enable()
682 adc->cfg->regs->ccr_vref.mask); in stm32_adc_int_ch_enable()
686 stm32_adc_set_bits_common(adc, adc->cfg->regs->ccr_vbat.reg, in stm32_adc_int_ch_enable()
687 adc->cfg->regs->ccr_vbat.mask); in stm32_adc_int_ch_enable()
693 static void stm32_adc_int_ch_disable(struct stm32_adc *adc) in stm32_adc_int_ch_disable() argument
698 if (adc->int_ch[i] == STM32_ADC_INT_CH_NONE) in stm32_adc_int_ch_disable()
703 stm32_adc_clr_bits(adc, adc->cfg->regs->or_vdd.reg, in stm32_adc_int_ch_disable()
704 adc->cfg->regs->or_vdd.mask); in stm32_adc_int_ch_disable()
707 stm32_adc_clr_bits_common(adc, adc->cfg->regs->ccr_vref.reg, in stm32_adc_int_ch_disable()
708 adc->cfg->regs->ccr_vref.mask); in stm32_adc_int_ch_disable()
711 stm32_adc_clr_bits_common(adc, adc->cfg->regs->ccr_vbat.reg, in stm32_adc_int_ch_disable()
712 adc->cfg->regs->ccr_vbat.mask); in stm32_adc_int_ch_disable()
730 struct stm32_adc *adc = iio_priv(indio_dev); in stm32f4_adc_start_conv() local
732 stm32_adc_set_bits(adc, STM32F4_ADC_CR1, STM32F4_SCAN); in stm32f4_adc_start_conv()
735 stm32_adc_set_bits(adc, STM32F4_ADC_CR2, in stm32f4_adc_start_conv()
738 stm32_adc_set_bits(adc, STM32F4_ADC_CR2, STM32F4_EOCS | STM32F4_ADON); in stm32f4_adc_start_conv()
744 if (!(stm32_adc_readl(adc, STM32F4_ADC_CR2) & STM32F4_EXTEN_MASK)) in stm32f4_adc_start_conv()
745 stm32_adc_set_bits(adc, STM32F4_ADC_CR2, STM32F4_SWSTART); in stm32f4_adc_start_conv()
750 struct stm32_adc *adc = iio_priv(indio_dev); in stm32f4_adc_stop_conv() local
752 stm32_adc_clr_bits(adc, STM32F4_ADC_CR2, STM32F4_EXTEN_MASK); in stm32f4_adc_stop_conv()
753 stm32_adc_clr_bits(adc, STM32F4_ADC_SR, STM32F4_STRT); in stm32f4_adc_stop_conv()
755 stm32_adc_clr_bits(adc, STM32F4_ADC_CR1, STM32F4_SCAN); in stm32f4_adc_stop_conv()
756 stm32_adc_clr_bits(adc, STM32F4_ADC_CR2, in stm32f4_adc_stop_conv()
762 struct stm32_adc *adc = iio_priv(indio_dev); in stm32f4_adc_irq_clear() local
764 stm32_adc_clr_bits(adc, adc->cfg->regs->isr_eoc.reg, msk); in stm32f4_adc_irq_clear()
769 struct stm32_adc *adc = iio_priv(indio_dev); in stm32h7_adc_start_conv() local
779 spin_lock_irqsave(&adc->lock, flags); in stm32h7_adc_start_conv()
780 val = stm32_adc_readl(adc, STM32H7_ADC_CFGR); in stm32h7_adc_start_conv()
782 stm32_adc_writel(adc, STM32H7_ADC_CFGR, val); in stm32h7_adc_start_conv()
783 spin_unlock_irqrestore(&adc->lock, flags); in stm32h7_adc_start_conv()
785 stm32_adc_set_bits(adc, STM32H7_ADC_CR, STM32H7_ADSTART); in stm32h7_adc_start_conv()
790 struct stm32_adc *adc = iio_priv(indio_dev); in stm32h7_adc_stop_conv() local
794 stm32_adc_set_bits(adc, STM32H7_ADC_CR, STM32H7_ADSTP); in stm32h7_adc_stop_conv()
802 stm32_adc_clr_bits(adc, STM32H7_ADC_CFGR, STM32H7_DMNGT_MASK); in stm32h7_adc_stop_conv()
807 struct stm32_adc *adc = iio_priv(indio_dev); in stm32h7_adc_irq_clear() local
809 stm32_adc_set_bits(adc, adc->cfg->regs->isr_eoc.reg, msk); in stm32h7_adc_irq_clear()
814 struct stm32_adc *adc = iio_priv(indio_dev); in stm32h7_adc_exit_pwr_down() local
819 stm32_adc_clr_bits(adc, STM32H7_ADC_CR, STM32H7_DEEPPWD); in stm32h7_adc_exit_pwr_down()
820 stm32_adc_set_bits(adc, STM32H7_ADC_CR, STM32H7_ADVREGEN); in stm32h7_adc_exit_pwr_down()
822 if (adc->common->rate > STM32H7_BOOST_CLKRATE) in stm32h7_adc_exit_pwr_down()
823 stm32_adc_set_bits(adc, STM32H7_ADC_CR, STM32H7_BOOST); in stm32h7_adc_exit_pwr_down()
826 if (!adc->cfg->has_vregready) { in stm32h7_adc_exit_pwr_down()
835 stm32_adc_set_bits(adc, STM32H7_ADC_CR, STM32H7_DEEPPWD); in stm32h7_adc_exit_pwr_down()
842 static void stm32h7_adc_enter_pwr_down(struct stm32_adc *adc) in stm32h7_adc_enter_pwr_down() argument
844 stm32_adc_clr_bits(adc, STM32H7_ADC_CR, STM32H7_BOOST); in stm32h7_adc_enter_pwr_down()
847 stm32_adc_set_bits(adc, STM32H7_ADC_CR, STM32H7_DEEPPWD); in stm32h7_adc_enter_pwr_down()
852 struct stm32_adc *adc = iio_priv(indio_dev); in stm32h7_adc_enable() local
856 stm32_adc_set_bits(adc, STM32H7_ADC_CR, STM32H7_ADEN); in stm32h7_adc_enable()
863 stm32_adc_set_bits(adc, STM32H7_ADC_CR, STM32H7_ADDIS); in stm32h7_adc_enable()
867 stm32_adc_set_bits(adc, STM32H7_ADC_ISR, STM32H7_ADRDY); in stm32h7_adc_enable()
875 struct stm32_adc *adc = iio_priv(indio_dev); in stm32h7_adc_disable() local
880 stm32_adc_set_bits(adc, STM32H7_ADC_CR, STM32H7_ADDIS); in stm32h7_adc_disable()
895 struct stm32_adc *adc = iio_priv(indio_dev); in stm32h7_adc_read_selfcalib() local
903 stm32_adc_clr_bits(adc, STM32H7_ADC_CR, lincalrdyw_mask); in stm32h7_adc_read_selfcalib()
914 val = stm32_adc_readl(adc, STM32H7_ADC_CALFACT2); in stm32h7_adc_read_selfcalib()
915 adc->cal.lincalfact[i] = (val & STM32H7_LINCALFACT_MASK); in stm32h7_adc_read_selfcalib()
916 adc->cal.lincalfact[i] >>= STM32H7_LINCALFACT_SHIFT; in stm32h7_adc_read_selfcalib()
922 val = stm32_adc_readl(adc, STM32H7_ADC_CALFACT); in stm32h7_adc_read_selfcalib()
923 adc->cal.calfact_s = (val & STM32H7_CALFACT_S_MASK); in stm32h7_adc_read_selfcalib()
924 adc->cal.calfact_s >>= STM32H7_CALFACT_S_SHIFT; in stm32h7_adc_read_selfcalib()
925 adc->cal.calfact_d = (val & STM32H7_CALFACT_D_MASK); in stm32h7_adc_read_selfcalib()
926 adc->cal.calfact_d >>= STM32H7_CALFACT_D_SHIFT; in stm32h7_adc_read_selfcalib()
927 adc->cal.calibrated = true; in stm32h7_adc_read_selfcalib()
939 struct stm32_adc *adc = iio_priv(indio_dev); in stm32h7_adc_restore_selfcalib() local
943 val = (adc->cal.calfact_s << STM32H7_CALFACT_S_SHIFT) | in stm32h7_adc_restore_selfcalib()
944 (adc->cal.calfact_d << STM32H7_CALFACT_D_SHIFT); in stm32h7_adc_restore_selfcalib()
945 stm32_adc_writel(adc, STM32H7_ADC_CALFACT, val); in stm32h7_adc_restore_selfcalib()
954 val = adc->cal.lincalfact[i] << STM32H7_LINCALFACT_SHIFT; in stm32h7_adc_restore_selfcalib()
955 stm32_adc_writel(adc, STM32H7_ADC_CALFACT2, val); in stm32h7_adc_restore_selfcalib()
956 stm32_adc_set_bits(adc, STM32H7_ADC_CR, lincalrdyw_mask); in stm32h7_adc_restore_selfcalib()
972 stm32_adc_clr_bits(adc, STM32H7_ADC_CR, lincalrdyw_mask); in stm32h7_adc_restore_selfcalib()
980 val = stm32_adc_readl(adc, STM32H7_ADC_CALFACT2); in stm32h7_adc_restore_selfcalib()
981 if (val != adc->cal.lincalfact[i] << STM32H7_LINCALFACT_SHIFT) { in stm32h7_adc_restore_selfcalib()
1012 struct stm32_adc *adc = iio_priv(indio_dev); in stm32h7_adc_selfcalib() local
1016 if (adc->cal.calibrated) in stm32h7_adc_selfcalib()
1024 stm32_adc_clr_bits(adc, STM32H7_ADC_CR, STM32H7_ADCALDIF); in stm32h7_adc_selfcalib()
1025 stm32_adc_clr_bits(adc, STM32H7_ADC_CR, STM32H7_ADCALLIN); in stm32h7_adc_selfcalib()
1028 stm32_adc_set_bits(adc, STM32H7_ADC_CR, STM32H7_ADCAL); in stm32h7_adc_selfcalib()
1043 stm32_adc_set_bits(adc, STM32H7_ADC_CR, in stm32h7_adc_selfcalib()
1045 stm32_adc_set_bits(adc, STM32H7_ADC_CR, STM32H7_ADCAL); in stm32h7_adc_selfcalib()
1055 stm32_adc_clr_bits(adc, STM32H7_ADC_CR, in stm32h7_adc_selfcalib()
1074 struct stm32_adc *adc = iio_priv(indio_dev); in stm32h7_adc_prepare() local
1088 stm32_adc_writel(adc, STM32H7_ADC_DIFSEL, adc->difsel); in stm32h7_adc_prepare()
1102 stm32_adc_writel(adc, STM32H7_ADC_PCSEL, adc->pcsel); in stm32h7_adc_prepare()
1109 stm32_adc_int_ch_disable(adc); in stm32h7_adc_prepare()
1111 stm32h7_adc_enter_pwr_down(adc); in stm32h7_adc_prepare()
1118 struct stm32_adc *adc = iio_priv(indio_dev); in stm32h7_adc_unprepare() local
1120 stm32_adc_writel(adc, STM32H7_ADC_PCSEL, 0); in stm32h7_adc_unprepare()
1122 stm32_adc_int_ch_disable(adc); in stm32h7_adc_unprepare()
1123 stm32h7_adc_enter_pwr_down(adc); in stm32h7_adc_unprepare()
1140 struct stm32_adc *adc = iio_priv(indio_dev); in stm32_adc_conf_scan_seq() local
1141 const struct stm32_adc_regs *sqr = adc->cfg->regs->sqr; in stm32_adc_conf_scan_seq()
1147 stm32_adc_writel(adc, adc->cfg->regs->smpr[0], adc->smpr_val[0]); in stm32_adc_conf_scan_seq()
1148 stm32_adc_writel(adc, adc->cfg->regs->smpr[1], adc->smpr_val[1]); in stm32_adc_conf_scan_seq()
1163 val = stm32_adc_readl(adc, sqr[i].reg); in stm32_adc_conf_scan_seq()
1166 stm32_adc_writel(adc, sqr[i].reg, val); in stm32_adc_conf_scan_seq()
1173 val = stm32_adc_readl(adc, sqr[0].reg); in stm32_adc_conf_scan_seq()
1176 stm32_adc_writel(adc, sqr[0].reg, val); in stm32_adc_conf_scan_seq()
1191 struct stm32_adc *adc = iio_priv(indio_dev); in stm32_adc_get_trig_extsel() local
1195 for (i = 0; adc->cfg->trigs[i].name; i++) { in stm32_adc_get_trig_extsel()
1202 !strcmp(adc->cfg->trigs[i].name, trig->name)) { in stm32_adc_get_trig_extsel()
1203 return adc->cfg->trigs[i].extsel; in stm32_adc_get_trig_extsel()
1222 struct stm32_adc *adc = iio_priv(indio_dev); in stm32_adc_set_trig() local
1234 exten = adc->trigger_polarity + STM32_EXTEN_HWTRIG_RISING_EDGE; in stm32_adc_set_trig()
1237 spin_lock_irqsave(&adc->lock, flags); in stm32_adc_set_trig()
1238 val = stm32_adc_readl(adc, adc->cfg->regs->exten.reg); in stm32_adc_set_trig()
1239 val &= ~(adc->cfg->regs->exten.mask | adc->cfg->regs->extsel.mask); in stm32_adc_set_trig()
1240 val |= exten << adc->cfg->regs->exten.shift; in stm32_adc_set_trig()
1241 val |= extsel << adc->cfg->regs->extsel.shift; in stm32_adc_set_trig()
1242 stm32_adc_writel(adc, adc->cfg->regs->exten.reg, val); in stm32_adc_set_trig()
1243 spin_unlock_irqrestore(&adc->lock, flags); in stm32_adc_set_trig()
1252 struct stm32_adc *adc = iio_priv(indio_dev); in stm32_adc_set_trig_pol() local
1254 adc->trigger_polarity = type; in stm32_adc_set_trig_pol()
1262 struct stm32_adc *adc = iio_priv(indio_dev); in stm32_adc_get_trig_pol() local
1264 return adc->trigger_polarity; in stm32_adc_get_trig_pol()
1294 struct stm32_adc *adc = iio_priv(indio_dev); in stm32_adc_single_conv() local
1296 const struct stm32_adc_regspec *regs = adc->cfg->regs; in stm32_adc_single_conv()
1301 reinit_completion(&adc->completion); in stm32_adc_single_conv()
1303 adc->bufi = 0; in stm32_adc_single_conv()
1310 stm32_adc_writel(adc, regs->smpr[0], adc->smpr_val[0]); in stm32_adc_single_conv()
1311 stm32_adc_writel(adc, regs->smpr[1], adc->smpr_val[1]); in stm32_adc_single_conv()
1314 val = stm32_adc_readl(adc, regs->sqr[1].reg); in stm32_adc_single_conv()
1317 stm32_adc_writel(adc, regs->sqr[1].reg, val); in stm32_adc_single_conv()
1320 stm32_adc_clr_bits(adc, regs->sqr[0].reg, regs->sqr[0].mask); in stm32_adc_single_conv()
1323 stm32_adc_clr_bits(adc, regs->exten.reg, regs->exten.mask); in stm32_adc_single_conv()
1325 stm32_adc_conv_irq_enable(adc); in stm32_adc_single_conv()
1327 adc->cfg->start_conv(indio_dev, false); in stm32_adc_single_conv()
1330 &adc->completion, STM32_ADC_TIMEOUT); in stm32_adc_single_conv()
1336 *res = adc->buffer[0]; in stm32_adc_single_conv()
1340 adc->cfg->stop_conv(indio_dev); in stm32_adc_single_conv()
1342 stm32_adc_conv_irq_disable(adc); in stm32_adc_single_conv()
1354 struct stm32_adc *adc = iio_priv(indio_dev); in stm32_adc_read_raw() local
1368 if (mask == IIO_CHAN_INFO_PROCESSED && adc->vrefint.vrefint_cal) in stm32_adc_read_raw()
1369 *val = STM32_ADC_VREFINT_VOLTAGE * adc->vrefint.vrefint_cal / *val; in stm32_adc_read_raw()
1376 *val = adc->common->vref_mv * 2; in stm32_adc_read_raw()
1379 *val = adc->common->vref_mv; in stm32_adc_read_raw()
1399 struct stm32_adc *adc = iio_priv(indio_dev); in stm32_adc_irq_clear() local
1401 adc->cfg->irq_clear(indio_dev, msk); in stm32_adc_irq_clear()
1407 struct stm32_adc *adc = iio_priv(indio_dev); in stm32_adc_threaded_isr() local
1408 const struct stm32_adc_regspec *regs = adc->cfg->regs; in stm32_adc_threaded_isr()
1409 u32 status = stm32_adc_readl(adc, regs->isr_eoc.reg); in stm32_adc_threaded_isr()
1410 u32 mask = stm32_adc_readl(adc, regs->ier_eoc.reg); in stm32_adc_threaded_isr()
1419 adc->cfg->stop_conv(indio_dev); in stm32_adc_threaded_isr()
1436 struct stm32_adc *adc = iio_priv(indio_dev); in stm32_adc_isr() local
1437 const struct stm32_adc_regspec *regs = adc->cfg->regs; in stm32_adc_isr()
1438 u32 status = stm32_adc_readl(adc, regs->isr_eoc.reg); in stm32_adc_isr()
1439 u32 mask = stm32_adc_readl(adc, regs->ier_eoc.reg); in stm32_adc_isr()
1452 stm32_adc_ovr_irq_disable(adc); in stm32_adc_isr()
1453 stm32_adc_conv_irq_disable(adc); in stm32_adc_isr()
1459 adc->buffer[adc->bufi] = stm32_adc_readw(adc, regs->dr); in stm32_adc_isr()
1461 adc->bufi++; in stm32_adc_isr()
1462 if (adc->bufi >= adc->num_conv) { in stm32_adc_isr()
1463 stm32_adc_conv_irq_disable(adc); in stm32_adc_isr()
1467 complete(&adc->completion); in stm32_adc_isr()
1491 struct stm32_adc *adc = iio_priv(indio_dev); in stm32_adc_set_watermark() local
1502 adc->rx_buf_sz = min(rx_buf_sz, watermark * 2 * adc->num_conv); in stm32_adc_set_watermark()
1510 struct stm32_adc *adc = iio_priv(indio_dev); in stm32_adc_update_scan_mode() local
1518 adc->num_conv = bitmap_weight(scan_mask, indio_dev->masklength); in stm32_adc_update_scan_mode()
1557 struct stm32_adc *adc = iio_priv(indio_dev); in stm32_adc_debugfs_reg_access() local
1566 stm32_adc_writel(adc, reg, writeval); in stm32_adc_debugfs_reg_access()
1568 *readval = stm32_adc_readl(adc, reg); in stm32_adc_debugfs_reg_access()
1585 static unsigned int stm32_adc_dma_residue(struct stm32_adc *adc) in stm32_adc_dma_residue() argument
1590 status = dmaengine_tx_status(adc->dma_chan, in stm32_adc_dma_residue()
1591 adc->dma_chan->cookie, in stm32_adc_dma_residue()
1595 unsigned int i = adc->rx_buf_sz - state.residue; in stm32_adc_dma_residue()
1599 if (i >= adc->bufi) in stm32_adc_dma_residue()
1600 size = i - adc->bufi; in stm32_adc_dma_residue()
1602 size = adc->rx_buf_sz + i - adc->bufi; in stm32_adc_dma_residue()
1613 struct stm32_adc *adc = iio_priv(indio_dev); in stm32_adc_dma_buffer_done() local
1614 int residue = stm32_adc_dma_residue(adc); in stm32_adc_dma_buffer_done()
1625 dev_dbg(&indio_dev->dev, "%s bufi=%d\n", __func__, adc->bufi); in stm32_adc_dma_buffer_done()
1628 u16 *buffer = (u16 *)&adc->rx_buf[adc->bufi]; in stm32_adc_dma_buffer_done()
1633 adc->bufi += indio_dev->scan_bytes; in stm32_adc_dma_buffer_done()
1634 if (adc->bufi >= adc->rx_buf_sz) in stm32_adc_dma_buffer_done()
1635 adc->bufi = 0; in stm32_adc_dma_buffer_done()
1641 struct stm32_adc *adc = iio_priv(indio_dev); in stm32_adc_dma_start() local
1646 if (!adc->dma_chan) in stm32_adc_dma_start()
1650 adc->rx_buf_sz, adc->rx_buf_sz / 2); in stm32_adc_dma_start()
1653 desc = dmaengine_prep_dma_cyclic(adc->dma_chan, in stm32_adc_dma_start()
1654 adc->rx_dma_buf, in stm32_adc_dma_start()
1655 adc->rx_buf_sz, adc->rx_buf_sz / 2, in stm32_adc_dma_start()
1667 dmaengine_terminate_sync(adc->dma_chan); in stm32_adc_dma_start()
1672 dma_async_issue_pending(adc->dma_chan); in stm32_adc_dma_start()
1679 struct stm32_adc *adc = iio_priv(indio_dev); in stm32_adc_buffer_postenable() local
1700 adc->bufi = 0; in stm32_adc_buffer_postenable()
1702 stm32_adc_ovr_irq_enable(adc); in stm32_adc_buffer_postenable()
1704 if (!adc->dma_chan) in stm32_adc_buffer_postenable()
1705 stm32_adc_conv_irq_enable(adc); in stm32_adc_buffer_postenable()
1707 adc->cfg->start_conv(indio_dev, !!adc->dma_chan); in stm32_adc_buffer_postenable()
1722 struct stm32_adc *adc = iio_priv(indio_dev); in stm32_adc_buffer_predisable() local
1725 adc->cfg->stop_conv(indio_dev); in stm32_adc_buffer_predisable()
1726 if (!adc->dma_chan) in stm32_adc_buffer_predisable()
1727 stm32_adc_conv_irq_disable(adc); in stm32_adc_buffer_predisable()
1729 stm32_adc_ovr_irq_disable(adc); in stm32_adc_buffer_predisable()
1731 if (adc->dma_chan) in stm32_adc_buffer_predisable()
1732 dmaengine_terminate_sync(adc->dma_chan); in stm32_adc_buffer_predisable()
1752 struct stm32_adc *adc = iio_priv(indio_dev); in stm32_adc_trigger_handler() local
1754 dev_dbg(&indio_dev->dev, "%s bufi=%d\n", __func__, adc->bufi); in stm32_adc_trigger_handler()
1757 adc->bufi = 0; in stm32_adc_trigger_handler()
1758 iio_push_to_buffers_with_timestamp(indio_dev, adc->buffer, in stm32_adc_trigger_handler()
1763 stm32_adc_conv_irq_enable(adc); in stm32_adc_trigger_handler()
1782 struct stm32_adc *adc = iio_priv(indio_dev); in stm32_adc_of_get_resolution() local
1787 res = adc->cfg->adc_info->resolutions[0]; in stm32_adc_of_get_resolution()
1789 for (i = 0; i < adc->cfg->adc_info->num_res; i++) in stm32_adc_of_get_resolution()
1790 if (res == adc->cfg->adc_info->resolutions[i]) in stm32_adc_of_get_resolution()
1792 if (i >= adc->cfg->adc_info->num_res) { in stm32_adc_of_get_resolution()
1798 adc->res = i; in stm32_adc_of_get_resolution()
1803 static void stm32_adc_smpr_init(struct stm32_adc *adc, int channel, u32 smp_ns) in stm32_adc_smpr_init() argument
1805 const struct stm32_adc_regs *smpr = &adc->cfg->regs->smp_bits[channel]; in stm32_adc_smpr_init()
1813 if (channel == adc->int_ch[STM32_ADC_INT_CH_VREFINT]) in stm32_adc_smpr_init()
1814 smp_ns = max(smp_ns, adc->cfg->ts_vrefint_ns); in stm32_adc_smpr_init()
1817 period_ns = NSEC_PER_SEC / adc->common->rate; in stm32_adc_smpr_init()
1819 if ((period_ns * adc->cfg->smp_cycles[smp]) >= smp_ns) in stm32_adc_smpr_init()
1825 adc->smpr_val[r] = (adc->smpr_val[r] & ~mask) | (smp << shift); in stm32_adc_smpr_init()
1832 struct stm32_adc *adc = iio_priv(indio_dev); in stm32_adc_chan_init_one() local
1833 char *name = adc->chan_name[vinp]; in stm32_adc_chan_init_one()
1847 if (chan->channel == adc->int_ch[STM32_ADC_INT_CH_VREFINT]) in stm32_adc_chan_init_one()
1854 chan->scan_type.realbits = adc->cfg->adc_info->resolutions[adc->res]; in stm32_adc_chan_init_one()
1859 adc->pcsel |= BIT(chan->channel); in stm32_adc_chan_init_one()
1862 adc->difsel |= BIT(chan->channel); in stm32_adc_chan_init_one()
1864 adc->pcsel |= BIT(chan->channel2); in stm32_adc_chan_init_one()
1868 static int stm32_adc_get_legacy_chan_count(struct iio_dev *indio_dev, struct stm32_adc *adc) in stm32_adc_get_legacy_chan_count() argument
1871 const struct stm32_adc_info *adc_info = adc->cfg->adc_info; in stm32_adc_get_legacy_chan_count()
1888 adc->num_diff = ret; in stm32_adc_get_legacy_chan_count()
1903 struct stm32_adc *adc, in stm32_adc_legacy_chan_init() argument
1907 const struct stm32_adc_info *adc_info = adc->cfg->adc_info; in stm32_adc_legacy_chan_init()
1909 u32 num_diff = adc->num_diff; in stm32_adc_legacy_chan_init()
1967 stm32_adc_smpr_init(adc, channels[i].channel, smp); in stm32_adc_legacy_chan_init()
1976 struct stm32_adc *adc = iio_priv(indio_dev); in stm32_adc_populate_int_ch() local
1982 adc->int_ch[i] = chan; in stm32_adc_populate_int_ch()
1996 adc->vrefint.vrefint_cal = vrefint; in stm32_adc_populate_int_ch()
2004 struct stm32_adc *adc, in stm32_adc_generic_chan_init() argument
2008 const struct stm32_adc_info *adc_info = adc->cfg->adc_info; in stm32_adc_generic_chan_init()
2030 strncpy(adc->chan_name[val], name, STM32_ADC_CH_SZ); in stm32_adc_generic_chan_init()
2066 stm32_adc_smpr_init(adc, channels[scan_index].channel, val); in stm32_adc_generic_chan_init()
2068 stm32_adc_smpr_init(adc, vin[1], val); in stm32_adc_generic_chan_init()
2089 struct stm32_adc *adc = iio_priv(indio_dev); in stm32_adc_chan_of_init() local
2090 const struct stm32_adc_info *adc_info = adc->cfg->adc_info; in stm32_adc_chan_of_init()
2096 adc->int_ch[i] = STM32_ADC_INT_CH_NONE; in stm32_adc_chan_of_init()
2103 ret = stm32_adc_get_legacy_chan_count(indio_dev, adc); in stm32_adc_chan_of_init()
2129 ret = stm32_adc_legacy_chan_init(indio_dev, adc, channels); in stm32_adc_chan_of_init()
2131 ret = stm32_adc_generic_chan_init(indio_dev, adc, channels); in stm32_adc_chan_of_init()
2157 struct stm32_adc *adc = iio_priv(indio_dev); in stm32_adc_dma_request() local
2161 adc->dma_chan = dma_request_chan(dev, "rx"); in stm32_adc_dma_request()
2162 if (IS_ERR(adc->dma_chan)) { in stm32_adc_dma_request()
2163 ret = PTR_ERR(adc->dma_chan); in stm32_adc_dma_request()
2169 adc->dma_chan = NULL; in stm32_adc_dma_request()
2173 adc->rx_buf = dma_alloc_coherent(adc->dma_chan->device->dev, in stm32_adc_dma_request()
2175 &adc->rx_dma_buf, GFP_KERNEL); in stm32_adc_dma_request()
2176 if (!adc->rx_buf) { in stm32_adc_dma_request()
2183 config.src_addr = (dma_addr_t)adc->common->phys_base; in stm32_adc_dma_request()
2184 config.src_addr += adc->offset + adc->cfg->regs->dr; in stm32_adc_dma_request()
2187 ret = dmaengine_slave_config(adc->dma_chan, &config); in stm32_adc_dma_request()
2194 dma_free_coherent(adc->dma_chan->device->dev, STM32_DMA_BUFFER_SIZE, in stm32_adc_dma_request()
2195 adc->rx_buf, adc->rx_dma_buf); in stm32_adc_dma_request()
2197 dma_release_channel(adc->dma_chan); in stm32_adc_dma_request()
2207 struct stm32_adc *adc; in stm32_adc_probe() local
2214 indio_dev = devm_iio_device_alloc(&pdev->dev, sizeof(*adc)); in stm32_adc_probe()
2218 adc = iio_priv(indio_dev); in stm32_adc_probe()
2219 adc->common = dev_get_drvdata(pdev->dev.parent); in stm32_adc_probe()
2220 spin_lock_init(&adc->lock); in stm32_adc_probe()
2221 init_completion(&adc->completion); in stm32_adc_probe()
2222 adc->cfg = (const struct stm32_adc_cfg *) in stm32_adc_probe()
2232 ret = of_property_read_u32(pdev->dev.of_node, "reg", &adc->offset); in stm32_adc_probe()
2238 adc->irq = platform_get_irq(pdev, 0); in stm32_adc_probe()
2239 if (adc->irq < 0) in stm32_adc_probe()
2240 return adc->irq; in stm32_adc_probe()
2242 ret = devm_request_threaded_irq(&pdev->dev, adc->irq, stm32_adc_isr, in stm32_adc_probe()
2250 adc->clk = devm_clk_get(&pdev->dev, NULL); in stm32_adc_probe()
2251 if (IS_ERR(adc->clk)) { in stm32_adc_probe()
2252 ret = PTR_ERR(adc->clk); in stm32_adc_probe()
2253 if (ret == -ENOENT && !adc->cfg->clk_required) { in stm32_adc_probe()
2254 adc->clk = NULL; in stm32_adc_probe()
2269 if (!adc->dma_chan) { in stm32_adc_probe()
2322 if (adc->dma_chan) { in stm32_adc_probe()
2323 dma_free_coherent(adc->dma_chan->device->dev, in stm32_adc_probe()
2325 adc->rx_buf, adc->rx_dma_buf); in stm32_adc_probe()
2326 dma_release_channel(adc->dma_chan); in stm32_adc_probe()
2335 struct stm32_adc *adc = iio_priv(indio_dev); in stm32_adc_remove() local
2344 if (adc->dma_chan) { in stm32_adc_remove()
2345 dma_free_coherent(adc->dma_chan->device->dev, in stm32_adc_remove()
2347 adc->rx_buf, adc->rx_dma_buf); in stm32_adc_remove()
2348 dma_release_channel(adc->dma_chan); in stm32_adc_remove()