Lines Matching refs:ts
178 static int hideep_pgm_w_mem(struct hideep_ts *ts, u32 addr, in hideep_pgm_w_mem() argument
181 struct pgm_packet *packet = (void *)ts->xfer_buf; in hideep_pgm_w_mem()
184 .addr = ts->client->addr, in hideep_pgm_w_mem()
198 ret = i2c_transfer(ts->client->adapter, &msg, 1); in hideep_pgm_w_mem()
205 static int hideep_pgm_r_mem(struct hideep_ts *ts, u32 addr, in hideep_pgm_r_mem() argument
208 struct pgm_packet *packet = (void *)ts->xfer_buf; in hideep_pgm_r_mem()
212 .addr = ts->client->addr, in hideep_pgm_r_mem()
218 .addr = ts->client->addr, in hideep_pgm_r_mem()
232 ret = i2c_transfer(ts->client->adapter, msg, ARRAY_SIZE(msg)); in hideep_pgm_r_mem()
239 static int hideep_pgm_r_reg(struct hideep_ts *ts, u32 addr, u32 *val) in hideep_pgm_r_reg() argument
244 error = hideep_pgm_r_mem(ts, addr, &data, 1); in hideep_pgm_r_reg()
246 dev_err(&ts->client->dev, in hideep_pgm_r_reg()
256 static int hideep_pgm_w_reg(struct hideep_ts *ts, u32 addr, u32 val) in hideep_pgm_w_reg() argument
261 error = hideep_pgm_w_mem(ts, addr, &data, 1); in hideep_pgm_w_reg()
263 dev_err(&ts->client->dev, in hideep_pgm_w_reg()
274 hideep_pgm_w_reg(ts, HIDEEP_SYSCON_WDT_CNT, (clk)); \
275 hideep_pgm_w_reg(ts, HIDEEP_SYSCON_WDT_CON, 0x03); \
276 hideep_pgm_w_reg(ts, HIDEEP_SYSCON_WDT_CON, 0x01); \
280 hideep_pgm_w_reg(ts, HIDEEP_FLASH_CON, \
284 hideep_pgm_w_reg(ts, HIDEEP_FLASH_PIO_SIG + (x), (y))
287 hideep_pgm_w_reg(ts, HIDEEP_FLASH_CON, 0x00)
296 static void hideep_pgm_set(struct hideep_ts *ts) in hideep_pgm_set() argument
298 hideep_pgm_w_reg(ts, HIDEEP_SYSCON_WDT_CON, 0x00); in hideep_pgm_set()
299 hideep_pgm_w_reg(ts, HIDEEP_SYSCON_SPC_CON, 0x00); in hideep_pgm_set()
300 hideep_pgm_w_reg(ts, HIDEEP_SYSCON_CLK_ENA, 0xFF); in hideep_pgm_set()
301 hideep_pgm_w_reg(ts, HIDEEP_SYSCON_CLK_CON, 0x01); in hideep_pgm_set()
302 hideep_pgm_w_reg(ts, HIDEEP_SYSCON_PWR_CON, 0x01); in hideep_pgm_set()
303 hideep_pgm_w_reg(ts, HIDEEP_FLASH_TIM, 0x03); in hideep_pgm_set()
304 hideep_pgm_w_reg(ts, HIDEEP_FLASH_CACHE_CFG, 0x00); in hideep_pgm_set()
307 static int hideep_pgm_get_pattern(struct hideep_ts *ts, u32 *pattern) in hideep_pgm_get_pattern() argument
313 error = regmap_bulk_write(ts->reg, p1, &p2, 1); in hideep_pgm_get_pattern()
315 dev_err(&ts->client->dev, in hideep_pgm_get_pattern()
324 error = hideep_pgm_w_reg(ts, HIDEEP_ESI_TX_INVALID, 0x01); in hideep_pgm_get_pattern()
328 error = hideep_pgm_r_reg(ts, HIDEEP_SYSCON_PGM_ID, pattern); in hideep_pgm_get_pattern()
335 static int hideep_enter_pgm(struct hideep_ts *ts) in hideep_enter_pgm() argument
342 error = hideep_pgm_get_pattern(ts, &pattern); in hideep_enter_pgm()
344 dev_err(&ts->client->dev, in hideep_enter_pgm()
347 dev_err(&ts->client->dev, "%s: bad pattern: %#08x\n", in hideep_enter_pgm()
350 dev_dbg(&ts->client->dev, "found magic code"); in hideep_enter_pgm()
352 hideep_pgm_set(ts); in hideep_enter_pgm()
359 dev_err(&ts->client->dev, "failed to enter pgm mode\n"); in hideep_enter_pgm()
364 static int hideep_nvm_unlock(struct hideep_ts *ts) in hideep_nvm_unlock() argument
369 hideep_pgm_w_reg(ts, HIDEEP_FLASH_CFG, HIDEEP_NVM_SFR_RPAGE); in hideep_nvm_unlock()
370 error = hideep_pgm_r_reg(ts, 0x0000000C, &unmask_code); in hideep_nvm_unlock()
371 hideep_pgm_w_reg(ts, HIDEEP_FLASH_CFG, HIDEEP_NVM_DEFAULT_PAGE); in hideep_nvm_unlock()
379 if (unmask_code != ts->nvm_mask) in hideep_nvm_unlock()
380 dev_warn(&ts->client->dev, in hideep_nvm_unlock()
382 unmask_code, ts->nvm_mask); in hideep_nvm_unlock()
384 hideep_pgm_w_reg(ts, HIDEEP_FLASH_CFG, HIDEEP_NVM_SFR_WPAGE); in hideep_nvm_unlock()
387 NVM_W_SFR(HIDEEP_NVM_MASK_OFS, ts->nvm_mask); in hideep_nvm_unlock()
389 hideep_pgm_w_reg(ts, HIDEEP_FLASH_CFG, HIDEEP_NVM_DEFAULT_PAGE); in hideep_nvm_unlock()
394 static int hideep_check_status(struct hideep_ts *ts) in hideep_check_status() argument
401 error = hideep_pgm_r_reg(ts, HIDEEP_FLASH_STA, &status); in hideep_check_status()
411 static int hideep_program_page(struct hideep_ts *ts, u32 addr, in hideep_program_page() argument
417 error = hideep_check_status(ts); in hideep_program_page()
431 error = hideep_check_status(ts); in hideep_program_page()
441 hideep_pgm_w_mem(ts, HIDEEP_FLASH_PIO_SIG | HIDEEP_WRONLY, in hideep_program_page()
451 error = hideep_check_status(ts); in hideep_program_page()
460 static int hideep_program_nvm(struct hideep_ts *ts, in hideep_program_nvm() argument
463 struct pgm_packet *packet_r = (void *)ts->xfer_buf; in hideep_program_nvm()
470 error = hideep_nvm_unlock(ts); in hideep_program_nvm()
478 error = hideep_pgm_r_mem(ts, 0x00000000 + addr, in hideep_program_nvm()
481 dev_err(&ts->client->dev, in hideep_program_nvm()
489 error = hideep_program_page(ts, addr, in hideep_program_nvm()
492 dev_err(&ts->client->dev, in hideep_program_nvm()
509 static int hideep_verify_nvm(struct hideep_ts *ts, in hideep_verify_nvm() argument
512 struct pgm_packet *packet_r = (void *)ts->xfer_buf; in hideep_verify_nvm()
524 error = hideep_pgm_r_mem(ts, 0x00000000 + addr, in hideep_verify_nvm()
527 dev_err(&ts->client->dev, in hideep_verify_nvm()
539 dev_err(&ts->client->dev, in hideep_verify_nvm()
556 static int hideep_load_dwz(struct hideep_ts *ts) in hideep_load_dwz() argument
561 error = hideep_enter_pgm(ts); in hideep_load_dwz()
567 error = hideep_pgm_r_mem(ts, HIDEEP_DWZ_INFO, in hideep_load_dwz()
568 (void *)&ts->dwz_info, in hideep_load_dwz()
569 sizeof(ts->dwz_info) / sizeof(__be32)); in hideep_load_dwz()
575 dev_err(&ts->client->dev, in hideep_load_dwz()
580 product_code = be16_to_cpu(ts->dwz_info.product_code); in hideep_load_dwz()
584 dev_dbg(&ts->client->dev, "used crimson IC"); in hideep_load_dwz()
585 ts->fw_size = 1024 * 48; in hideep_load_dwz()
586 ts->nvm_mask = 0x00310000; in hideep_load_dwz()
589 dev_dbg(&ts->client->dev, "used lime IC"); in hideep_load_dwz()
590 ts->fw_size = 1024 * 64; in hideep_load_dwz()
591 ts->nvm_mask = 0x0030027B; in hideep_load_dwz()
594 dev_err(&ts->client->dev, "product code is wrong: %#04x", in hideep_load_dwz()
599 dev_dbg(&ts->client->dev, "firmware release version: %#04x", in hideep_load_dwz()
600 be16_to_cpu(ts->dwz_info.release_ver)); in hideep_load_dwz()
605 static int hideep_flash_firmware(struct hideep_ts *ts, in hideep_flash_firmware() argument
612 error = hideep_program_nvm(ts, ucode, ucode_len); in hideep_flash_firmware()
614 error = hideep_verify_nvm(ts, ucode, ucode_len); in hideep_flash_firmware()
623 static int hideep_update_firmware(struct hideep_ts *ts, in hideep_update_firmware() argument
628 dev_dbg(&ts->client->dev, "starting firmware update"); in hideep_update_firmware()
631 error = hideep_enter_pgm(ts); in hideep_update_firmware()
635 error = hideep_flash_firmware(ts, ucode, ucode_len); in hideep_update_firmware()
637 dev_err(&ts->client->dev, in hideep_update_firmware()
640 dev_dbg(&ts->client->dev, "firmware updated successfully\n"); in hideep_update_firmware()
644 error2 = hideep_load_dwz(ts); in hideep_update_firmware()
646 dev_err(&ts->client->dev, in hideep_update_firmware()
653 static int hideep_power_on(struct hideep_ts *ts) in hideep_power_on() argument
657 error = regulator_enable(ts->vcc_vdd); in hideep_power_on()
659 dev_err(&ts->client->dev, in hideep_power_on()
664 error = regulator_enable(ts->vcc_vid); in hideep_power_on()
666 dev_err(&ts->client->dev, in hideep_power_on()
672 if (ts->reset_gpio) { in hideep_power_on()
673 gpiod_set_value_cansleep(ts->reset_gpio, 0); in hideep_power_on()
675 error = regmap_write(ts->reg, HIDEEP_RESET_CMD, 0x01); in hideep_power_on()
677 dev_err(&ts->client->dev, in hideep_power_on()
688 struct hideep_ts *ts = data; in hideep_power_off() local
690 if (ts->reset_gpio) in hideep_power_off()
691 gpiod_set_value(ts->reset_gpio, 1); in hideep_power_off()
693 regulator_disable(ts->vcc_vid); in hideep_power_off()
694 regulator_disable(ts->vcc_vdd); in hideep_power_off()
717 static void hideep_parse_and_report(struct hideep_ts *ts) in hideep_parse_and_report() argument
720 (void *)&ts->xfer_buf[HIDEEP_TOUCH_EVENT_INDEX]; in hideep_parse_and_report()
721 const u8 *keys = &ts->xfer_buf[HIDEEP_KEY_EVENT_INDEX]; in hideep_parse_and_report()
722 int touch_count = ts->xfer_buf[0]; in hideep_parse_and_report()
723 int key_count = ts->xfer_buf[1] & 0x0f; in hideep_parse_and_report()
724 int lpm_count = ts->xfer_buf[1] & 0xf0; in hideep_parse_and_report()
728 dev_dbg(&ts->client->dev, "mt = %d, key = %d, lpm = %02x", in hideep_parse_and_report()
733 hideep_report_slot(ts->input_dev, events + i); in hideep_parse_and_report()
739 input_report_key(ts->input_dev, in hideep_parse_and_report()
740 ts->key_codes[key_data & HIDEEP_KEY_IDX_MASK], in hideep_parse_and_report()
744 input_mt_sync_frame(ts->input_dev); in hideep_parse_and_report()
745 input_sync(ts->input_dev); in hideep_parse_and_report()
750 struct hideep_ts *ts = handle; in hideep_irq() local
755 error = regmap_bulk_read(ts->reg, HIDEEP_EVENT_ADDR, in hideep_irq()
756 ts->xfer_buf, HIDEEP_MAX_EVENT / 2); in hideep_irq()
758 dev_err(&ts->client->dev, "failed to read events: %d\n", error); in hideep_irq()
762 hideep_parse_and_report(ts); in hideep_irq()
768 static int hideep_get_axis_info(struct hideep_ts *ts) in hideep_get_axis_info() argument
773 error = regmap_bulk_read(ts->reg, 0x28, val, ARRAY_SIZE(val)); in hideep_get_axis_info()
777 ts->prop.max_x = le16_to_cpup(val); in hideep_get_axis_info()
778 ts->prop.max_y = le16_to_cpup(val + 1); in hideep_get_axis_info()
780 dev_dbg(&ts->client->dev, "X: %d, Y: %d", in hideep_get_axis_info()
781 ts->prop.max_x, ts->prop.max_y); in hideep_get_axis_info()
786 static int hideep_init_input(struct hideep_ts *ts) in hideep_init_input() argument
788 struct device *dev = &ts->client->dev; in hideep_init_input()
792 ts->input_dev = devm_input_allocate_device(dev); in hideep_init_input()
793 if (!ts->input_dev) { in hideep_init_input()
798 ts->input_dev->name = HIDEEP_TS_NAME; in hideep_init_input()
799 ts->input_dev->id.bustype = BUS_I2C; in hideep_init_input()
800 input_set_drvdata(ts->input_dev, ts); in hideep_init_input()
802 input_set_capability(ts->input_dev, EV_ABS, ABS_MT_POSITION_X); in hideep_init_input()
803 input_set_capability(ts->input_dev, EV_ABS, ABS_MT_POSITION_Y); in hideep_init_input()
804 input_set_abs_params(ts->input_dev, ABS_MT_PRESSURE, 0, 65535, 0, 0); in hideep_init_input()
805 input_set_abs_params(ts->input_dev, ABS_MT_TOUCH_MAJOR, 0, 255, 0, 0); in hideep_init_input()
806 input_set_abs_params(ts->input_dev, ABS_MT_TOOL_TYPE, in hideep_init_input()
808 touchscreen_parse_properties(ts->input_dev, true, &ts->prop); in hideep_init_input()
810 if (ts->prop.max_x == 0 || ts->prop.max_y == 0) { in hideep_init_input()
811 error = hideep_get_axis_info(ts); in hideep_init_input()
816 error = input_mt_init_slots(ts->input_dev, HIDEEP_MT_MAX, in hideep_init_input()
821 ts->key_num = device_property_count_u32(dev, "linux,keycodes"); in hideep_init_input()
822 if (ts->key_num > HIDEEP_KEY_MAX) { in hideep_init_input()
824 ts->key_num); in hideep_init_input()
828 if (ts->key_num <= 0) { in hideep_init_input()
833 ts->key_codes, in hideep_init_input()
834 ts->key_num); in hideep_init_input()
840 if (ts->key_num) { in hideep_init_input()
841 ts->input_dev->keycode = ts->key_codes; in hideep_init_input()
842 ts->input_dev->keycodesize = sizeof(ts->key_codes[0]); in hideep_init_input()
843 ts->input_dev->keycodemax = ts->key_num; in hideep_init_input()
845 for (i = 0; i < ts->key_num; i++) in hideep_init_input()
846 input_set_capability(ts->input_dev, EV_KEY, in hideep_init_input()
847 ts->key_codes[i]); in hideep_init_input()
851 error = input_register_device(ts->input_dev); in hideep_init_input()
865 struct hideep_ts *ts = i2c_get_clientdata(client); in hideep_update_fw() local
876 be16_to_cpu(ts->dwz_info.product_id)); in hideep_update_fw()
893 if (fw_entry->size > ts->fw_size) { in hideep_update_fw()
895 fw_entry->size, ts->fw_size); in hideep_update_fw()
900 mutex_lock(&ts->dev_mutex); in hideep_update_fw()
903 error = hideep_update_firmware(ts, (const __be32 *)fw_entry->data, in hideep_update_fw()
907 mutex_unlock(&ts->dev_mutex); in hideep_update_fw()
921 struct hideep_ts *ts = i2c_get_clientdata(client); in hideep_fw_version_show() local
924 mutex_lock(&ts->dev_mutex); in hideep_fw_version_show()
926 be16_to_cpu(ts->dwz_info.release_ver)); in hideep_fw_version_show()
927 mutex_unlock(&ts->dev_mutex); in hideep_fw_version_show()
936 struct hideep_ts *ts = i2c_get_clientdata(client); in hideep_product_id_show() local
939 mutex_lock(&ts->dev_mutex); in hideep_product_id_show()
941 be16_to_cpu(ts->dwz_info.product_id)); in hideep_product_id_show()
942 mutex_unlock(&ts->dev_mutex); in hideep_product_id_show()
965 struct hideep_ts *ts = i2c_get_clientdata(client); in hideep_suspend() local
968 hideep_power_off(ts); in hideep_suspend()
976 struct hideep_ts *ts = i2c_get_clientdata(client); in hideep_resume() local
979 error = hideep_power_on(ts); in hideep_resume()
1003 struct hideep_ts *ts; in hideep_probe() local
1017 ts = devm_kzalloc(&client->dev, sizeof(*ts), GFP_KERNEL); in hideep_probe()
1018 if (!ts) in hideep_probe()
1021 ts->client = client; in hideep_probe()
1022 i2c_set_clientdata(client, ts); in hideep_probe()
1023 mutex_init(&ts->dev_mutex); in hideep_probe()
1025 ts->reg = devm_regmap_init_i2c(client, &hideep_regmap_config); in hideep_probe()
1026 if (IS_ERR(ts->reg)) { in hideep_probe()
1027 error = PTR_ERR(ts->reg); in hideep_probe()
1033 ts->vcc_vdd = devm_regulator_get(&client->dev, "vdd"); in hideep_probe()
1034 if (IS_ERR(ts->vcc_vdd)) in hideep_probe()
1035 return PTR_ERR(ts->vcc_vdd); in hideep_probe()
1037 ts->vcc_vid = devm_regulator_get(&client->dev, "vid"); in hideep_probe()
1038 if (IS_ERR(ts->vcc_vid)) in hideep_probe()
1039 return PTR_ERR(ts->vcc_vid); in hideep_probe()
1041 ts->reset_gpio = devm_gpiod_get_optional(&client->dev, in hideep_probe()
1043 if (IS_ERR(ts->reset_gpio)) in hideep_probe()
1044 return PTR_ERR(ts->reset_gpio); in hideep_probe()
1046 error = hideep_power_on(ts); in hideep_probe()
1052 error = devm_add_action_or_reset(&client->dev, hideep_power_off, ts); in hideep_probe()
1056 error = hideep_load_dwz(ts); in hideep_probe()
1062 error = hideep_init_input(ts); in hideep_probe()
1068 client->name, ts); in hideep_probe()