Lines Matching refs:reg_base
34 static void __iomem *reg_base; variable
60 static void __init ck_set_gc(struct device_node *node, void __iomem *reg_base, in ck_set_gc() argument
66 gc->reg_base = reg_base; in ck_set_gc()
111 reg_base = of_iomap(node, 0); in ck_intc_init_comm()
112 if (!reg_base) { in ck_intc_init_comm()
153 readl(reg_base + GX_INTC_PEN63_32), 32); in gx_irq_handler()
158 readl(reg_base + GX_INTC_PEN31_00), 0); in gx_irq_handler()
175 writel(0x0, reg_base + GX_INTC_NEN31_00); in gx_intc_init()
176 writel(0x0, reg_base + GX_INTC_NEN63_32); in gx_intc_init()
181 writel(0x0, reg_base + GX_INTC_NMASK31_00); in gx_intc_init()
182 writel(0x0, reg_base + GX_INTC_NMASK63_32); in gx_intc_init()
184 setup_irq_channel(0x03020100, reg_base + GX_INTC_SOURCE); in gx_intc_init()
186 ck_set_gc(node, reg_base, GX_INTC_NEN31_00, 0); in gx_intc_init()
187 ck_set_gc(node, reg_base, GX_INTC_NEN63_32, 32); in gx_intc_init()
202 void __iomem *reg_pen_lo = reg_base + CK_INTC_PEN31_00; in ck_irq_handler()
203 void __iomem *reg_pen_hi = reg_base + CK_INTC_PEN63_32; in ck_irq_handler()
240 writel(0, reg_base + CK_INTC_NEN31_00); in ck_intc_init()
241 writel(0, reg_base + CK_INTC_NEN63_32); in ck_intc_init()
244 writel(BIT(31), reg_base + CK_INTC_ICR); in ck_intc_init()
246 ck_set_gc(node, reg_base, CK_INTC_NEN31_00, 0); in ck_intc_init()
247 ck_set_gc(node, reg_base, CK_INTC_NEN63_32, 32); in ck_intc_init()
249 setup_irq_channel(0x00010203, reg_base + CK_INTC_SOURCE); in ck_intc_init()
270 writel(0, reg_base + CK_INTC_NEN31_00 + CK_INTC_DUAL_BASE); in ck_dual_intc_init()
271 writel(0, reg_base + CK_INTC_NEN63_32 + CK_INTC_DUAL_BASE); in ck_dual_intc_init()
273 ck_set_gc(node, reg_base + CK_INTC_DUAL_BASE, CK_INTC_NEN31_00, 64); in ck_dual_intc_init()
274 ck_set_gc(node, reg_base + CK_INTC_DUAL_BASE, CK_INTC_NEN63_32, 96); in ck_dual_intc_init()
277 reg_base + CK_INTC_SOURCE + CK_INTC_DUAL_BASE); in ck_dual_intc_init()