Lines Matching refs:hwirq
85 int hwirq, int enable) in plic_toggle() argument
87 u32 __iomem *reg = handler->enable_base + (hwirq / 32) * sizeof(u32); in plic_toggle()
88 u32 hwirq_mask = 1 << (hwirq % 32); in plic_toggle()
104 writel(enable, priv->regs + PRIORITY_BASE + d->hwirq * PRIORITY_PER_ID); in plic_irq_toggle()
110 plic_toggle(handler, d->hwirq, enable); in plic_irq_toggle()
168 writel(d->hwirq, handler->hart_base + CONTEXT_CLAIM); in plic_irq_eoi()
171 writel(d->hwirq, handler->hart_base + CONTEXT_CLAIM); in plic_irq_eoi()
186 irq_hw_number_t hwirq) in plic_irqdomain_map() argument
190 irq_domain_set_info(d, irq, hwirq, &plic_chip, d->host_data, in plic_irqdomain_map()
201 irq_hw_number_t hwirq; in plic_irq_domain_alloc() local
205 ret = irq_domain_translate_onecell(domain, fwspec, &hwirq, &type); in plic_irq_domain_alloc()
210 ret = plic_irqdomain_map(domain, virq + i, hwirq + i); in plic_irq_domain_alloc()
235 irq_hw_number_t hwirq; in plic_handle_irq() local
241 while ((hwirq = readl(claim))) { in plic_handle_irq()
243 hwirq); in plic_handle_irq()
246 hwirq); in plic_handle_irq()
315 irq_hw_number_t hwirq; in plic_init() local
371 for (hwirq = 1; hwirq <= nr_irqs; hwirq++) in plic_init()
372 plic_toggle(handler, hwirq, 0); in plic_init()