Lines Matching refs:hwirq
44 writel(BIT(d->hwirq), data->base + EIREQCLR); in exiu_irq_eoi()
53 val = readl_relaxed(data->base + EIMASK) | BIT(d->hwirq); in exiu_irq_mask()
63 val = readl_relaxed(data->base + EIMASK) & ~BIT(d->hwirq); in exiu_irq_unmask()
74 writel_relaxed(BIT(d->hwirq), data->base + EIREQCLR); in exiu_irq_enable()
76 val = readl_relaxed(data->base + EIMASK) & ~BIT(d->hwirq); in exiu_irq_enable()
88 val |= BIT(d->hwirq); in exiu_irq_set_type()
90 val &= ~BIT(d->hwirq); in exiu_irq_set_type()
95 val &= ~BIT(d->hwirq); in exiu_irq_set_type()
97 val |= BIT(d->hwirq); in exiu_irq_set_type()
100 writel_relaxed(BIT(d->hwirq), data->base + EIREQCLR); in exiu_irq_set_type()
121 unsigned long *hwirq, in exiu_domain_translate() argument
133 *hwirq = fwspec->param[1] - info->spi_base; in exiu_domain_translate()
138 *hwirq = fwspec->param[0]; in exiu_domain_translate()
150 irq_hw_number_t hwirq; in exiu_domain_alloc() local
159 hwirq = fwspec->param[1] - info->spi_base; in exiu_domain_alloc()
161 hwirq = fwspec->param[0]; in exiu_domain_alloc()
162 parent_fwspec.param[0] = hwirq + info->spi_base + 32; in exiu_domain_alloc()
165 irq_domain_set_hwirq_and_chip(dom, virq, hwirq, &exiu_irq_chip, info); in exiu_domain_alloc()