Lines Matching refs:irqc
46 static void xintc_write(struct xintc_irq_chip *irqc, int reg, u32 data) in xintc_write() argument
49 iowrite32be(data, irqc->base + reg); in xintc_write()
51 iowrite32(data, irqc->base + reg); in xintc_write()
54 static u32 xintc_read(struct xintc_irq_chip *irqc, int reg) in xintc_read() argument
57 return ioread32be(irqc->base + reg); in xintc_read()
59 return ioread32(irqc->base + reg); in xintc_read()
64 struct xintc_irq_chip *irqc = irq_data_get_irq_chip_data(d); in intc_enable_or_unmask() local
74 xintc_write(irqc, IAR, mask); in intc_enable_or_unmask()
76 xintc_write(irqc, SIE, mask); in intc_enable_or_unmask()
81 struct xintc_irq_chip *irqc = irq_data_get_irq_chip_data(d); in intc_disable_or_mask() local
84 xintc_write(irqc, CIE, BIT(d->hwirq)); in intc_disable_or_mask()
89 struct xintc_irq_chip *irqc = irq_data_get_irq_chip_data(d); in intc_ack() local
92 xintc_write(irqc, IAR, BIT(d->hwirq)); in intc_ack()
97 struct xintc_irq_chip *irqc = irq_data_get_irq_chip_data(d); in intc_mask_ack() local
101 xintc_write(irqc, CIE, mask); in intc_mask_ack()
102 xintc_write(irqc, IAR, mask); in intc_mask_ack()
129 struct xintc_irq_chip *irqc = d->host_data; in xintc_map() local
131 if (irqc->intr_mask & BIT(hw)) { in xintc_map()
140 irq_set_chip_data(irq, irqc); in xintc_map()
152 struct xintc_irq_chip *irqc; in xil_intc_irq_handler() local
154 irqc = irq_data_get_irq_handler_data(&desc->irq_data); in xil_intc_irq_handler()
157 u32 hwirq = xintc_read(irqc, IVR); in xil_intc_irq_handler()
162 generic_handle_domain_irq(irqc->root_domain, hwirq); in xil_intc_irq_handler()
170 struct xintc_irq_chip *irqc; in xilinx_intc_of_init() local
173 irqc = kzalloc(sizeof(*irqc), GFP_KERNEL); in xilinx_intc_of_init()
174 if (!irqc) in xilinx_intc_of_init()
176 irqc->base = of_iomap(intc, 0); in xilinx_intc_of_init()
177 BUG_ON(!irqc->base); in xilinx_intc_of_init()
179 ret = of_property_read_u32(intc, "xlnx,num-intr-inputs", &irqc->nr_irq); in xilinx_intc_of_init()
185 ret = of_property_read_u32(intc, "xlnx,kind-of-intr", &irqc->intr_mask); in xilinx_intc_of_init()
188 irqc->intr_mask = 0; in xilinx_intc_of_init()
191 if (irqc->intr_mask >> irqc->nr_irq) in xilinx_intc_of_init()
195 intc, irqc->nr_irq, irqc->intr_mask); in xilinx_intc_of_init()
202 xintc_write(irqc, IER, 0); in xilinx_intc_of_init()
205 xintc_write(irqc, IAR, 0xffffffff); in xilinx_intc_of_init()
208 xintc_write(irqc, MER, MER_HIE | MER_ME); in xilinx_intc_of_init()
209 if (xintc_read(irqc, MER) != (MER_HIE | MER_ME)) { in xilinx_intc_of_init()
211 xintc_write(irqc, MER, MER_HIE | MER_ME); in xilinx_intc_of_init()
214 irqc->root_domain = irq_domain_add_linear(intc, irqc->nr_irq, in xilinx_intc_of_init()
215 &xintc_irq_domain_ops, irqc); in xilinx_intc_of_init()
216 if (!irqc->root_domain) { in xilinx_intc_of_init()
227 irqc); in xilinx_intc_of_init()
234 primary_intc = irqc; in xilinx_intc_of_init()
241 iounmap(irqc->base); in xilinx_intc_of_init()
242 kfree(irqc); in xilinx_intc_of_init()