Lines Matching refs:ADV76XX_PAGE_HDMI
553 return adv76xx_read_check(state, ADV76XX_PAGE_HDMI, reg); in hdmi_read()
565 return regmap_write(state->regmap[ADV76XX_PAGE_HDMI], reg, val); in hdmi_write()
2806 [ADV76XX_PAGE_HDMI] = { "hdmi", 0x34 },
2947 { ADV76XX_REG(ADV76XX_PAGE_HDMI, 0x0d), 0x04 }, /* HDMI filter optimization */
2948 { ADV76XX_REG(ADV76XX_PAGE_HDMI, 0x0d), 0x04 }, /* HDMI filter optimization */
2949 { ADV76XX_REG(ADV76XX_PAGE_HDMI, 0x3d), 0x00 }, /* DDC bus active pull-up control */
2950 { ADV76XX_REG(ADV76XX_PAGE_HDMI, 0x3e), 0x74 }, /* TMDS PLL optimization */
2951 { ADV76XX_REG(ADV76XX_PAGE_HDMI, 0x4e), 0x3b }, /* TMDS PLL optimization */
2952 { ADV76XX_REG(ADV76XX_PAGE_HDMI, 0x57), 0x74 }, /* TMDS PLL optimization */
2953 { ADV76XX_REG(ADV76XX_PAGE_HDMI, 0x58), 0x63 }, /* TMDS PLL optimization */
2954 { ADV76XX_REG(ADV76XX_PAGE_HDMI, 0x8d), 0x18 }, /* equaliser */
2955 { ADV76XX_REG(ADV76XX_PAGE_HDMI, 0x8e), 0x34 }, /* equaliser */
2956 { ADV76XX_REG(ADV76XX_PAGE_HDMI, 0x93), 0x88 }, /* equaliser */
2957 { ADV76XX_REG(ADV76XX_PAGE_HDMI, 0x94), 0x2e }, /* equaliser */
2958 { ADV76XX_REG(ADV76XX_PAGE_HDMI, 0x96), 0x00 }, /* enable automatic EQ changing */
2974 { ADV76XX_REG(ADV76XX_PAGE_HDMI, 0x0d), 0x84 }, /* HDMI filter optimization */
2975 { ADV76XX_REG(ADV76XX_PAGE_HDMI, 0x3d), 0x10 }, /* DDC bus active pull-up control */
2976 { ADV76XX_REG(ADV76XX_PAGE_HDMI, 0x3e), 0x39 }, /* TMDS PLL optimization */
2977 { ADV76XX_REG(ADV76XX_PAGE_HDMI, 0x4e), 0x3b }, /* TMDS PLL optimization */
2978 { ADV76XX_REG(ADV76XX_PAGE_HDMI, 0x57), 0xb6 }, /* TMDS PLL optimization */
2979 { ADV76XX_REG(ADV76XX_PAGE_HDMI, 0x58), 0x03 }, /* TMDS PLL optimization */
2980 { ADV76XX_REG(ADV76XX_PAGE_HDMI, 0x8d), 0x18 }, /* equaliser */
2981 { ADV76XX_REG(ADV76XX_PAGE_HDMI, 0x8e), 0x34 }, /* equaliser */
2982 { ADV76XX_REG(ADV76XX_PAGE_HDMI, 0x93), 0x8b }, /* equaliser */
2983 { ADV76XX_REG(ADV76XX_PAGE_HDMI, 0x94), 0x2d }, /* equaliser */
2984 { ADV76XX_REG(ADV76XX_PAGE_HDMI, 0x96), 0x01 }, /* enable automatic EQ changing */
2997 { ADV76XX_REG(ADV76XX_PAGE_HDMI, 0x9b), 0x03 },
2998 { ADV76XX_REG(ADV76XX_PAGE_HDMI, 0x6f), 0x08 },
2999 { ADV76XX_REG(ADV76XX_PAGE_HDMI, 0x85), 0x1f },
3000 { ADV76XX_REG(ADV76XX_PAGE_HDMI, 0x87), 0x70 },
3001 { ADV76XX_REG(ADV76XX_PAGE_HDMI, 0x57), 0xda },
3002 { ADV76XX_REG(ADV76XX_PAGE_HDMI, 0x58), 0x01 },
3003 { ADV76XX_REG(ADV76XX_PAGE_HDMI, 0x03), 0x98 },
3004 { ADV76XX_REG(ADV76XX_PAGE_HDMI, 0x4c), 0x44 },
3005 { ADV76XX_REG(ADV76XX_PAGE_HDMI, 0x8d), 0x04 },
3006 { ADV76XX_REG(ADV76XX_PAGE_HDMI, 0x8e), 0x1e },
3013 { ADV76XX_REG(ADV76XX_PAGE_HDMI, 0x9b), 0x03 },
3014 { ADV76XX_REG(ADV76XX_PAGE_HDMI, 0x6f), 0x08 },
3015 { ADV76XX_REG(ADV76XX_PAGE_HDMI, 0x85), 0x1f },
3016 { ADV76XX_REG(ADV76XX_PAGE_HDMI, 0x87), 0x70 },
3017 { ADV76XX_REG(ADV76XX_PAGE_HDMI, 0x57), 0xda },
3018 { ADV76XX_REG(ADV76XX_PAGE_HDMI, 0x58), 0x01 },
3019 { ADV76XX_REG(ADV76XX_PAGE_HDMI, 0x03), 0x98 },
3020 { ADV76XX_REG(ADV76XX_PAGE_HDMI, 0x4c), 0x44 },
3064 BIT(ADV76XX_PAGE_EDID) | BIT(ADV76XX_PAGE_HDMI) |
3112 BIT(ADV76XX_PAGE_HDMI) | BIT(ADV76XX_PAGE_CP),
3161 BIT(ADV76XX_PAGE_HDMI) | BIT(ADV76XX_PAGE_CP),