Lines Matching refs:MC417_RWD
600 cx_write(MC417_RWD, 0x00001e00); in p8000_set_voltage()
602 cx_write(MC417_RWD, 0x00001a00); in p8000_set_voltage()
604 cx_write(MC417_RWD, 0x00001800); in p8000_set_voltage()
688 cx_write(MC417_RWD, SP2_CTRL_OFF | in cx23885_sp2_ci_ctrl()
690 cx_clear(MC417_RWD, SP2_ADLO); in cx23885_sp2_ci_ctrl()
691 cx_write(MC417_RWD, SP2_CTRL_OFF | in cx23885_sp2_ci_ctrl()
693 cx_clear(MC417_RWD, SP2_ADHI); in cx23885_sp2_ci_ctrl()
700 cx_write(MC417_RWD, SP2_CTRL_OFF | data); in cx23885_sp2_ci_ctrl()
703 cx_clear(MC417_RWD, SP2_CS0); in cx23885_sp2_ci_ctrl()
706 cx_clear(MC417_RWD, (read) ? SP2_RD : SP2_WR); in cx23885_sp2_ci_ctrl()
711 tmp = cx_read(MC417_RWD); in cx23885_sp2_ci_ctrl()
717 cx_set(MC417_RWD, SP2_CTRL_OFF); in cx23885_sp2_ci_ctrl()
940 mem = cx_read(MC417_RWD); in netup_altera_fpga_rw()
960 cx_write(MC417_RWD, mem); /* start RW cycle */ in netup_altera_fpga_rw()
963 mem = cx_read(MC417_RWD); in netup_altera_fpga_rw()
971 cx_set(MC417_RWD, ALT_RD | ALT_WR | ALT_CS); in netup_altera_fpga_rw()