Lines Matching refs:writel_relaxed
357 writel_relaxed(val, csid->base + CSID_TPG_VC_CFG0); in csid_configure_stream()
361 writel_relaxed(val, csid->base + CSID_TPG_VC_CFG1); in csid_configure_stream()
363 writel_relaxed(0x12345678, csid->base + CSID_TPG_LFSR_SEED); in csid_configure_stream()
367 writel_relaxed(val, csid->base + CSID_TPG_DT_n_CFG_0(0)); in csid_configure_stream()
370 writel_relaxed(val, csid->base + CSID_TPG_DT_n_CFG_1(0)); in csid_configure_stream()
375 writel_relaxed(val, csid->base + CSID_TPG_DT_n_CFG_2(0)); in csid_configure_stream()
377 writel_relaxed(0, csid->base + CSID_TPG_COLOR_BARS_CFG); in csid_configure_stream()
379 writel_relaxed(0, csid->base + CSID_TPG_COLOR_BOX_CFG); in csid_configure_stream()
389 writel_relaxed(val, csid->base + CSID_RDI_CFG0(0)); in csid_configure_stream()
393 writel_relaxed(val, csid->base + CSID_RDI_CFG1(0)); in csid_configure_stream()
396 writel_relaxed(val, csid->base + CSID_RDI_FRM_DROP_PERIOD(0)); in csid_configure_stream()
399 writel_relaxed(0, csid->base + CSID_RDI_FRM_DROP_PATTERN(0)); in csid_configure_stream()
402 writel_relaxed(val, csid->base + CSID_RDI_IRQ_SUBSAMPLE_PERIOD(0)); in csid_configure_stream()
405 writel_relaxed(val, csid->base + CSID_RDI_IRQ_SUBSAMPLE_PATTERN(0)); in csid_configure_stream()
408 writel_relaxed(val, csid->base + CSID_RDI_RPP_PIX_DROP_PERIOD(0)); in csid_configure_stream()
411 writel_relaxed(val, csid->base + CSID_RDI_RPP_PIX_DROP_PATTERN(0)); in csid_configure_stream()
414 writel_relaxed(val, csid->base + CSID_RDI_RPP_LINE_DROP_PERIOD(0)); in csid_configure_stream()
417 writel_relaxed(val, csid->base + CSID_RDI_RPP_LINE_DROP_PATTERN(0)); in csid_configure_stream()
420 writel_relaxed(val, csid->base + CSID_RDI_CTRL(0)); in csid_configure_stream()
424 writel_relaxed(val, csid->base + CSID_RDI_CFG0(0)); in csid_configure_stream()
434 writel_relaxed(val, csid->base + CSID_TPG_CTRL); in csid_configure_stream()
440 writel_relaxed(val, csid->base + CSID_CSI2_RX_CFG0); in csid_configure_stream()
444 writel_relaxed(val, csid->base + CSID_CSI2_RX_CFG1); // csi2_vc_mode_shift_val ? in csid_configure_stream()
447 writel_relaxed(~0u, csid->base + CSID_CSI2_RX_IRQ_MASK); in csid_configure_stream()
450 writel_relaxed(~0u, csid->base + CSID_TOP_IRQ_MASK); in csid_configure_stream()
453 writel_relaxed(val, csid->base + CSID_RDI_CTRL(0)); in csid_configure_stream()
501 writel_relaxed(val, csid->base + CSID_TOP_IRQ_CLEAR); in csid_isr()
505 writel_relaxed(val, csid->base + CSID_CSI2_RX_IRQ_CLEAR); in csid_isr()
508 writel_relaxed(val, csid->base + CSID_CSI2_RDIN_IRQ_CLEAR(0)); in csid_isr()
511 writel_relaxed(val, csid->base + CSID_IRQ_CMD); in csid_isr()
532 writel_relaxed(1, csid->base + CSID_TOP_IRQ_CLEAR); in csid_reset()
533 writel_relaxed(1, csid->base + CSID_IRQ_CMD); in csid_reset()
534 writel_relaxed(1, csid->base + CSID_TOP_IRQ_MASK); in csid_reset()
535 writel_relaxed(1, csid->base + CSID_IRQ_CMD); in csid_reset()
539 writel_relaxed(val, csid->base + CSID_RST_STROBES); in csid_reset()